Performance analysis of a novel trench SOI LDMOS with centrosymmetric double vertical field plates

A novel trench SOI LDMOS with centrosymmetric double vertical field plates structure (CDVFPT SOI LDMOS) is proposed in this paper. The 2-D device simulator MEDICI is used to investigate the characteristics of the proposed structure. Compared with the conventional trench SOI LDMOS (CT SOI LDMOS), the optimized device shows an obvious reduction in the specific on-resistance (Ron,sp) when its breakdown voltage (BV) is enhanced due to the introduction of centrosymmetric double vertical field plates structure. And when compared to previous device with floating vertical field plate trench SOI LDMOS (FVFPT SOI LDMOS), the overall performance of CDVFPT SOI LDMOS is also promoted. According to the simulation results, compared to a CT SOI LDMOS, the BV of CDVFPT SOI LDMOS increases from 188 V to 234 V. The Ron,sp, however, decreases from 2.30 mΩ·cm2 to 1.24 mΩ·cm2. In addition, the maximum lattice temperature at 1 mW/μm2 is slightly reduced. Keywords: Power MOSFET, Vertical field plate, Breakdown voltage, Specific on-resistanc