Investigation of Common Mode Voltage in 5-level Diode Clamped MLI using carrier based SPWM Techniques

The main aim of this paper is to investigate the Common Mode Voltage (CMV) and Total Harmonic Distortion (THD) infive level Diode Clamped Inverter using Carrier based SPWM techniques. The common mode voltage exists between neutral point ofstar connected load and system ground. Various Carrier based SPWM techniques used to analyze CMV and THD in this paper arePhase Disposition (PD) strategy, Phase Opposition Disposition (POD) strategy, Alternative Phase Opposition Disposition (APOD)strategy, Carrier Overlap Phase Disposition (COPD) Strategy, Carrier Overlap Phase Opposition Disposition (COPOD) strategy andCarrier Overlap Alternative Phase Opposition Disposition (COAPOD) strategy.RL load is connected to inverter circuit for analysispurpose and Simulation is performed using MATLAB/Simulink Software.