Design of Inductor-Based High-Switching Frequency Step-Down DC-DC Power Converters

在一個積體電路系統中，電源管理晶片扮演了相當重要的角色，其負責提供一個穩定的電壓源，一個理想上不隨電池電壓或是輸出電流而有所變化的電壓源；然而，電源管理晶片所需的外掛電感以及電容，佔據了相當大的使用空間。本論文提出兩種微小型電源轉換器，用以減小外掛元件的數量以及大小。 第一個作品利用電流操控模式特有的單極點特性，以及提高操作的頻率，不僅將補償器的外掛元件數量減少至一個，更將所需之元件數值減小。另外，藉由提升轉導的瞬態率以及內建軟啟動機制，分別將暫態響應速率提升三十倍，以及消除電路啟動時不穩定的狀態。在兩千萬赫茲的操作頻率下，本作品使用兩百四十奈米亨利的電感及兩百二十奈米法拉的電容，輸入電壓為一點二伏特，輸出電壓為零點九伏特，實現一能源轉換效率達百分之七十三點五的微小型基於電感之高切換頻率降壓型直流對直流電源轉換器。 第二個作品利用數位控制的方式，將補償器外掛元件完全移除以外，更使用所提出之二進制權延遲線數位脈衝寬度調變器，將原本六十四轉一數據選擇器的面積節省下來。四位元窗型快閃類比數位轉換器有效節省百分之八十七點五的能源消耗及面積，並且將類比數位轉換器的延遲時間減至最低。在五千萬赫茲的操作頻率下，本作品使用一百奈米亨利的電感及一百奈米法拉的電容，輸入電壓為一點二伏特，輸出電壓為零點八伏特，實現一能源轉換效率高達百分之八十一的微小型基於電感之數位控制高切換頻率降壓型直流對直流電源轉換器。Power management IC (PMIC) is a critical building block in integrated circuits for providing stable supply voltages, which ideally don’t change with the battery voltage and the output load current. However, due to the limited area, large inductors and capacitors used in the PMICs are not preferred in modern portable devices. In this thesis, two compact dc-dc power converters are proposed to minimize the off-chip component sizes with different controller types. In the first work, an inductor-based high-switching frequency current-controlled step-down dc-dc power converter is proposed to reduce the off-chip component sizes. With the inherent one pole characteristic, only one additional off-chip capacitor is used. The slew-rate enhanced g_m stage is designed to improve the transient response by 30X faster while the soft-start circuit is employed to prevent ambiguity when circuit turns on. Operating at 20 MHz switching frequency, a compact dc-dc power converter is realized with 240 nH inductor and 220 nF capacitor and the power conversion efficiency is as high as 73.5 %. In the second work, an inductor-based high-switching frequency digital-controlled step-down dc-dc power converter with weighted delay-line DPWM is proposed to further reduce the off-chip component sizes. A 4-bit window-flash ADC is employed to save 87.5 % of the power and area and minimize the ADC latency. Meanwhile, the proposed weighted delay-line DPWM successfully converts the digital code into time-domain duty cycle information without the redundant 64-to-1 MUX. Operating at 50 MHz switching frequency, a compact dc-dc power converter is realized with 100 nH inductor and 100 nF capacitor and the power conversion efficiency is over 80 % for load current ranges from 350 mA to 550 mA