High-Speed Algorithms for Scatterometry Diagnosis and GPU-based Optical Lithography Simulation

為了保證奈米壓印製造光柵的品質，光散射(optical scatterometry) 是一個有效率和有效的方法來診斷實際光柵的幾何形狀。為了方便診斷的過程，一個有效率針對大型資料庫的匹配演算法是非常重要的。在本篇論文中，我們提出一個有效的演算法利用最小誤差(MSE)的方式用來比對大型的頻譜資料庫，藉此反推始的幾何組態。我們利用奇異值分解(Singular Value Decomposition)對大型的資料庫作壓縮並使用分層的動差(Moment)匹配方式來執行匹配演算法。我們的搜尋和診斷演算法是非常快速且精確的。跟傳統的最小誤差比起來，快上了3000 倍以上且精確度在0.1\%以內。 光學微顯影成像技術(Optical micro-lithography image technology)是目前半導體製造中關鍵的一步。隨著著超大型積體電路(VLSI, very-large-scale integrated-circuit)製程的演進，元件的特徵尺寸(feature size)正挑戰曝光光源波長的解析極限。因此，各種製程中的非理想效應在設計以及驗證的階段都必須精確地納入考慮以及模擬，以確保製程的良率(good yield)以及功能正確性。然而在最先進的製程中，單一晶片上的元件數量動輒百萬，此一模擬與分析往往耗日廢時，因此如何快速得到成像結果的高速微顯影佔有相當重要的地位。在此論文中，我們提出以平行運算的方式來加速製程的模擬進而能提供更有效率最佳化以及驗證。To ensure the quality of the nano-imprint fabricated optical gratings, optical scatterometry (OS) is an efficient and effective mean to diagnose the actual fabricated geometry. To facilitate the diagnosis process, efficient pattern matching algorithms over a huge database are of great importance. In my thesis, I will present an efficient algorithm to perform the least-square pattern matching in a huge simulated spectrum database. Equipped with singular value decomposition and hierarchical moment matching algorithm, the searching and diagnosis algorithm is extremely fast and accurate. It is over $3000 imes$ faster than a plain searching algorithm within 0.1\% accuracy. Optical micro-lithography image technology is a critical step in semiconductor manufacturing. As the VLSI manufacture technology develops, the feature size of micro-electronic devices shrinks smaller than the wavelength of exposure light source and challenges the limit of micro-lithography image system. Therefore, non-ideal effects in various processes of the stage of design and verification must be accurately taken into account and simulated to ensure a good yield of wafer and functional correctness. For this reason, high speed micro-lithography simulator is in strong demand for growing computational complexity to state-of-art resolution enhancement technology(RET) when handling modern industrial cases with millions of devices. In this work, we utilize parallel computing to speed up the image generation in micro-lithography simulation in order to provide more efficient optimization and verification