CMOS Microwave Vector Signal Processing Components and Applications

本論文係研究微波向量訊號處理元件於互補金氧半導體製程上的理論分析及實現方法，其中包含可360度調整之相移器、具相位反相功能之可調式衰減器及可調式延遲線。此相移器採用向量相加之方式來達到可調整360度的相位移，其包含一個3-dB方向耦合器、兩個具相位反相功能之可調式衰減器及一個威爾金森功率合成器，這些元件皆使用合成傳輸來實現以達到電路縮小化之設計。在理論分析中證明非理想的具相位反相功能之可調式衰減器將會增加相移器之均方根相位誤差以及振幅大小變異。因此，本論文提出一個設計流程可以消除可調式衰減器中方向耦合器之非理想效應及反射式負載的寄生效應。此設計使具相位反相功能之可調式衰減器達到理想的相位反相功能及降低其隨衰減量變化之相位移。在K-頻段中，此360度相移器之均方根相位誤差及振幅大小變異分別小於2.5度及0.45 dB。同時，此相移器之群延遲變異僅有6.7 ps。經由模擬與實驗證明本論文提出之相移器具有精確的相位控制及良好的相位線性度。 另一方面，可調式延遲線亦被實現於標準互補金氧半導體製程中，此電路採用反射式電路架構，其包含一個方向耦合器及兩個相同的反射式可變負載。不同於傳統的電感、電容串聯式可變負載，本論文使用電感、電容並聯式可變負載。經由理論分析此款設計具有較大的群延遲調整範圍，在K-頻段中，其具有87 ps群延遲調整範圍。為了補償反射式可變負載造成的損耗，本論文使用負阻抗產生器消除反射式可變負載的寄生電阻。在其中心頻率，24 GHz，此款具有負阻抗補償的可調式延遲線可以達到196.2 ps的群延遲調整範圍且介入損耗僅有1.25 dB。 同時，本論文提出兩種不同的放大器設計。第一種放大器具有平坦的群延遲響應。經實驗證明此放大器在22到26 GHz頻段中其群延遲變異小於5ps。另一個放大器具有高反向隔離度，其在24 GHz的順向增益及反向隔離度分別為12.5及37.2 dB。為了更進一步證明本論文所使用的合成傳輸線具有高度的系統整合能力，一個使用具有填充冗金屬合成傳輸線的放大器亦實現於本論文中。經實驗證明這些冗金屬對於電路的電氣特性影響相當輕微。 最後，將上述的相移器、可調式衰減器及具有平坦的群延遲響應的放大器整合於單晶積體化微波系統晶片中。本論文提出的單晶積體化微波系統晶片包含四天線波束合成器及具有窄頻及寬頻洩漏波抑制的主動式近循環器。此波束合成器使用標準0.13-um互補金氧半導體製程實現，其電路面積為1980 um × 2000 um。在中心頻率，24 GHz，其順向增益及輸入P1dB分別為6.7 dB及-19.8 dBm。此波束合成器可控制之相位移及振幅大小範圍分別為360度及20 dB，同時群延遲變異為22.8 ps。經由實驗結果證明展此款波束合成器具有良好的天線場型合成能力及高線性度。 本論文提出之互補金氧半導體主動式近循環器，其採用順向餽入技術消除從發射端洩漏至接收端的訊號。當操作在23.6 GHz時，在發射及接收路徑的增亦分別為22.4 及13.5 dB，同時具有44.7 dB的洩漏波抑制能力。為了增加洩漏波抑制的頻寬，本論文提出另一款主動式近循環器的設計。首先，讓洩漏路徑及順向餽入路徑具有相同的群延遲。更進一步地，順向餽入路徑中的相移器及可調式衰減器採用本論文提出之設計可以降低相位及振幅調整時的群延遲變異，以達到寬頻的洩漏波抑制能力。此款主動式近循環器實現於標準0.13-um互補金氧半導體製程。在22到26 GHz之操作頻段中，具有30 dB的洩漏波抑制能力。This dissertation focuses on the analysis and design of the CMOS microwave vector signal processing components, including the phase shifter, the phase-invertible variable attenuator (PIVA), and the variable delay line. The proposed CMOS vector-sum based phase shifter consists of one 3-dB directional coupler, two identical PIVAs, and one Wilkinson power combiner. All building blocks are realized by using the synthetic transmission lines for circuit miniaturization. The theoretical analyses confirm the effects of the non-ideal PIVA on the increasing of the root-mean-square (RMS) phase error and magnitude variation of the phase shifter. The design procedures, which can eliminate the effects from the voltage-dependent parasitics of the reflection load and the non-ideal directional coupler, are reported to make an ideal phase reversal and reduce the attenuation-dependent phase shifting of the PIVA. The comparisons between simulated and experimental results show that the proposed design can cover full 360 degree phase shifting with less than 2.5degree of RMS phase error and 0.45 dB of magnitude variation from 20 to 28 GHz. Meanwhile, the proposed CMOS vector-sum based phase shifter has a flat group-delay deviation of 6.7 ps at K-band. The experimental results show the proposed phase shifter has precise phase control and good phase linearity. On the other hand, a refection-type variable delay line (VDL) is realized in standard CMOS technology. It consists of one directional coupler and two identical reflection loads. The theoretical derivations show that the reflection load in the parallel form can make the reflection-type VDL achieve wider tuning range of the group delay than that of the reflection load in the series form. The proposed variable delay line has a tuning range of the group delay higher than 87 ps in K-band. Furthermore, to compensate the loss of the reflection load, the cross-coupled pair is adopted to eliminate the resistive parasitics of the reflection load. It has a group-delay tuning range of 196.2 ps and insertion loss of 1.25 dB at 24 GHz. Meanwhile, two CMOS amplifier designs are presented in this dissertation. The experimental result shows that the deviation of the group delay of the proposed amplifier is less than 5 ps from 22 to 26 GHz. Another amplifier with high reverse isolation design has forward transmission gain and reverse isolation of 12.5 and 37.2 dB at 24 GHz, respectively. Furthermore, the proposed synthetic transmission lines with dummy fills are adopted in the amplifier design. The experimental results show a few effects on the electrical characteristics of the amplifier, revealing the feasibility for system integration. Finally, the monolithic integrated microwave systems incorporating the proposed phase shifter, PIVA, amplifier with flat group delay response are implemented in the standard CMOS technologies, including the four-element beamformer, the active quasi-circulators with narrow- and wide-band leakage suppression. The proposed beamformer is realized in standard 0.13-um CMOS technology with a chip size of 1980 um × 2000 um. The forward transmission gain and input P1dB of the proposed beamformer are 6.7 dB and -19.8 dBm, respectively. It has a phase shifting range of 360degree, a magnitude controlled range of 20 dB, and a group-delay deviation of 22.8 ps. The experimental results show the proposed beamformer has good pattern synthesizing capability and high linearity. The proposed CMOS active quasi-circulator incorporating feedforward technique has dual transmission gains in the transmitting and receiving paths with the leakage suppression of 44.7 dB at 23.63 GHz. Furthermore, to extend the bandwidth of the leakage suppression, the strategies of the proposed design are following. The first is equalized the group delays of leakage and feed-forward path. The second is reduced the group delay deviation of magnitude/phase controlled unit during magnitude and phase adjustment. The proposed K-band active quasi-circulator with wideband leakage suppression is realized in the standard CMOS 0.13-um 1P8M technology. From 22 to 26 GHz, the leakage suppression from transmitter to receiver is larger than 30 dB