Analog Multiplier for Boundary Conduction Mode Boost Power Factor Correction Circuit

近年來因諧波失真問題被重視，為了符合各國所訂定的標準，功率因數校正電路已為電源供應器重要的一部分；在現行主動式功率因數校正電路架構中，類比乘法器為控制電路中的核心。本文主要探討應用於功率校正電路之類比乘法器，提出透過將輸入電壓位準向上平移一個臨界電壓，改良利用兩MOS並聯，一個操作在線性區，一個操作在飽和區，所形成的線性可變電阻，運用於非反向放大器，透過輸入改變可變電阻大小，改變非反向放大器閉迴路增益達到乘法器之功能；並將邊界導通模式升壓功率因數校正電路的控制迴路做出，將所改良的類比乘法器應用於其中，將電路結果用Hspice模擬出，以驗證所提出的類比乘法器適合應用於功率校正電路。In recent years, harmonic distortion problem has been emphasized. To achieve the standards which were made by each country, power factor correctors have played an important role in switching power supplies. In current architecture of active power factor corrector, input current is controlled by input voltage which multiplies feedback control signal to become sinusoidal wave; hence analog multipliers are the heart of the control circuits. This thesis mainly discusses on an analog multiplier which can be applied to power factor corrector, and purposes a method by shifting input voltage up one threshold voltage, improving the analog multiplier using linear variable resistor applies in non-inverting amplifier. The linear variable resistor is composed of two MOS in parallel. One is operated in linear region, and the other is operated in saturation region. The value of linear variable resistance will change by input; therefore change the gain of non-inverting amplifier to realize multiplier. In this thesis, a complete boundary conduction mode boost PFC circuit is built with the proposed multiplier. Finally, simulation outcomes of Hspice verify that the purposed multiplier can be used for PFC circuit.第一章 序論 1.1 研究背景與動機 1.2 論文架構 3二章 功率因數校正 4.1 功率因數校正原理 4.2 升壓功率因數校正電路系統 6三章 類比乘法器架構 9.1 一般類比乘法器原理 9.2 可變線性電阻乘法器 16四章 改良可變線性電阻乘法器 18.1 改良動機 18.2 改良電路架構 19.3 臨界電壓取出電路 23.4 電路不理想效應 28五章 邊界導通模式升壓功率因數校正電路架構 29.1 電路整體架構 29.2 輸出回授放大器 32.3 電壓比較器 33.4 零電流偵測電路 34.5 SR閂鎖與閘極驅動電路 37六章 模擬結果 40.1 改良線性電阻類比乘法器模擬結果 40.2 邊界導通模式升壓功率因數校正電路模擬結果 45七章 總結 48.1 總結 48.2 未來展望 48考文獻 4