Optimization and Compression for Sigma–Delta Modulation Based Signal Generation

在許多的研究及報告中，類比測試訊號可以使用一個由三角積分器產生的位元流透過低通濾波器來產生，然而，在自我內建測試的應用上，其用來儲存位元流的記憶體是有限的，而這可能會大幅限制了所能夠產生的類比測試訊號品質。在這篇論文裡，首先，我們確認由我們產生的高品質位元流的確符合測試訊號規格。 接著，我們以軟體實做出用來壓縮位元流的編碼器，以及相對應用來解壓縮的硬體解碼器。由硬體解碼器所解壓縮出來的位元流，將被用來產生類比訊號。It has been reported that analog test stimulus generation may be realized by low pass filtering a sigma-delta modulated 1-bit data stream. However, for BIST (Built-In Self-Test) applications, the available storage for storing the bit steam may limit the quality of the generated analog signal. In this thesis, we first identify a high-quality bit stream that meets the test signal specification. Then we implement the software encoder to compress the bit stream, and the corresponding hardware decoder (to be implemented on-chip) to decompress the bit stream for analog signal generation.TABLE OF CONTENTS 1 LIST OF FIGURES 3 LIST OF TABLES 5 ACKNOWLEDGEMENT 6 ABSTRACT 8 1 INTRODUCTION 9 1.1 MOTIVATION 9 1.2 ORGANIZATION OF THE THESIS 10 2 PRELIMINARIES 12 2.1 DATA COMPRESSION METHODOLOGY 12 2.1.1 Run-Length Codes 13 2.1.2 Huffman Codes 14 2.1.3 Arithmetic Coding 17 2.2 THE PAST RELATED WORK 18 2.2.1 Low-Pass Sigma Delta Oscillator 18 2.2.2 Signal Generation Using Sigma-Delta Oscillator Periodic Bitstream 20 2.2.3 Multi-Tone Signal Generation 23 3 THE IMPLEMENTED SIGNAL GENERATION AND COMPRESSION TECHNIQUE 24 3.1 BASIC ARCHITECTURE OF SIGNAL GENERATION CIRCUIT 24 3.2 BIT STREAM SELECTION 26 3.3 COMPRESSION OF BITSTREAM 26 3.3.1 Huffman Coding 27 3.3.2 Markov Tree – Huffman Coding 27 3.3.3 The Proposed Sequence Transformation Technique 29 3.4 DECODER DESIGN 32 3.4.1 Implemented Huffman Decoder 33 4 SIMULATION RESULTS 37 4.1 BITSTREAM SELECTION 37 4.2 COMPRESSION OF BITSTREAM 40 4.2.1 Huffman Coding 40 4.2.2 Markov – Huffman Coding 41 4.2.3 Huffman Coding after Sequence Transformation 44 4.3 SIMULATION RESULTS OF DECODER 46 4.4 SIMULATION RESULTS OF THE RECOVERED SIGNAL 47 5 CONCLUSIONS AND FUTURE WORK 49 REFERENCE 5