Resonant Tunneling in Si/SiGe Heterostructure

矽鍺材料具有能與矽基半導體工業整合的優點。由於擁有高電子遷移率及良好高頻響應的特性，近年矽鍺材料及電子元件，已躍升成為半導體工業界的寵兒，並已應用在手機、射頻技術、全球定位系統、功率放大器、無線網路等等。此外，隨著磊晶技術的成熟，許多小尺寸的量子元件已可成功製造。在本文中，我們將報告一種利用矽/矽鍺異質結構製作而成的的量子元件—共振穿隧二極體。 矽/矽鍺異質結構的能帶排列取決於矽或矽鍺層的應變，為了確保在矽/矽鍺異質結構的導帶中存在高位障，在設計結構時，讓矽鍺位障磊晶層受到應變，並使用分子束磊晶(MBE)成長該樣品。我們已經成功製作出n型矽/矽鍺異質結構共振穿隧二極體，並在低溫下可觀察得負電阻現象，峰值電流2.18E-4安培且峰對谷電流比為1.073。根據實驗結果的顯示，我們也逐步地修改製程參數，以達到更好的測量結果。在本論文的最後我們討論影響峰對谷電流比的原因，並提出一些建議。 共振穿隧元件在未來邏輯電路的應用上已經吸引可觀的目光。因此，成功的結合矽鍺材料與共振穿隧二極體在CMOS電路應用上將會有相當大的潛力。Silicon Germanium (SiGe) has the advantage of being fully compatible with the Si-based semiconductor industry. In recent years, SiGe has become much attractive for its properties of high electron mobility and good high-frequency response and has been applied in mobile phone, radio frequency (RF) technology, global positioning system (GPS), power amplifier (PA), wireless LAN and so on. Besides, with the progress of the growth technology, many quantum devices with small sizes have been accomplished. In this thesis, one of the quantum devices, the resonant tunneling diodes (RTDs), with Si/SiGe heterostructure operating at low temperature are reported. The band alignment of Si/SiGe heterostructure is influenced by the strain effect on Si or SiGe layer. Si/SiGe heterostructure are designed with strain in SiGe layer to confirm strained SiGe layer has higher barriers than the virtual substrate in the conduction band. We have fabricated an n-type Si/SiGe heterostructure RTD by molecular beam epitaxy (MBE) successfully. Peak current of 2.1789E-4 A with peak to valley current ratio of 1.073 has been achieved at low temperature. According to the measurement results, the fabrication process can be modified to elevate the device performance. Finally, the factors that influence the peak to valley current ratio of RTDs are discussed and some suggestions are provided for future work. Resonant tunneling quantum devices have attracted considerable attention for future logic circuit applications. Thus, the successful combination of SiGe material and RTDs shows great potential in CMOS circuits.Contents Abstract List of Figures List of Tables Chapter 1 Introduction…………………………..… …1 1.1 Introduction……………………………………………………… ……1 1.2 Motivation…………………………………………………………… ..3 1.3 Thesis Organization…………………………………………..………. 5 1.4 Band Structure of Si/SiGe Heterostructure……………………………6 1.4.1 Introduction to Strain Effect..................................................… ...6 1.4.2 Strain Effect on the Valence Band of SiGe…………………… ...9 1.4.3 Strain Effect on the Conduction Band of SiGe………………... 11 1.4.4 Band Alignment of SiGe/Si/SiGe………………………..……. 13 References…………………………………………………………… …..14 Chapter 2 Theory of Resonant Tunneling Diodes… .16 2.1 Principle of Resonant Tunneling Diodes…………………………. ....16 2.1.1 Double Barrier Quantum Well Structure……………………… 16 2.1.2 Physical Processes in RTDs………………………………… ....18 2.2 Negative Differential Resistance Characteristics…………………… 20 2.2.1 Transmission coefficient…………………………………….… 20 2.2.2 Current-Voltage Characteristics……………………………….. 25 2.3 Related Works on Si/SiGe RTDs………………………………...….. 28 References…………………………………………………………..…… 29 Chapter 3 Fabrication of Si/SiGe RTDs and Measurement Setup……………………… 31 3.1 Sample Preparation………………………………………………….. 31 3.2 Fabrication Processes……………………………………………..…. 35 3.2.1 Sample Cleaning………………………………………………. 35 3.2.2 First Photolithography for Mesa Pattern…………………….… 36 3.2.3 Dry Etching for the Mesa……………………………...……… 40 3.2.4 Second Photolithography for Metal Contact……………….…. 42 3.2.5 Metal Evaporation…………………………………………..… 42 3.2.6 Lift off……………………………………………………… ….43 3.2.7 Annealing for Ohmic Contact…………………………….…… 43 3.2.8 Wire Bonding……………………………………………….… .44 3.3 Instrument Setup for Measurement…………………………………. 46 3.3.1 Current-Voltage (I-V)…………………………………………. 46 3.3.2 Measurement with Varying Temperature…………………… …46 References……………………………………………………………. .…48 Chapter 4 Results and Discussions……………….… 49 4.1 Current-Voltage Results of N698………………………………… .…49 4.2 Discussions………………………………………………………… ..54 4.2.1 The Peak Voltage Position…………………………………..… 54 4.2.2 Peak to Valley Current Ratio………………………………….. 56 References………………………………………………………………. .57 Chapter 5 Conclusions and future work…………… 58 5.1 Conclusions………………………………………………………….. 58 5.2 Suggestion for Future Work…………………………………………. 5