A design trade-off study for n-channel δ-doped Si/SiGe heterojunction MOSFET's has been performed using a combination of numerical simulation and analysis. The design parameters unique to the δ-doped Si/SiGe heterostructure MOSFET's have been studied in terms of their effects on short-channel immunity, off-state leakage and on-state current. Our study shows that cap and channel layer must always be made as thin as possible to reduce the separation of the mobile charge centroid from the surface, in which case better short-channel immunity, better leakage and driving ability will result. On the other hand, the setback layer thickness, potential well depth and δ-doping dose are found to be trade-off parameters. Design windows that based on the...
The unproved transport properties of new channel materials, such as Ge and III-V semiconductors, alo...
Channel length of metal oxide semiconductor field effect transistors (MOSFETs) are scaling below 20 ...
The constant pace of CMOS technology scaling has enabled continuous improvement in integrated-circui...
Rights Copyright © is held by the author. Digital access to this material is made possible by the Un...
This thesis demonstrates the advantages and disadvantages of investigated p-type SiGe MOSFETs with h...
Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the...
For many decades, the semiconductor industry has miniaturized transistors,delivering increased compu...
High mobility channel materials are very promising for enhanced transport in future nanoscale MOSFET...
In the current CMOS sub-nano scale regime, hetero channel MOSFETs are one of the capable candidates ...
The development of nanoscale MOSFETs has given rise to increased attention paid to the role of paras...
This paper presents optimization techniques for 20 nm channel length novel Si/SiGe heterojunction p-...
Incorporation of pseudomorphic SiGe layers into Si CMOS has prospects of improving the hole channel ...
Incorporation of pseudomorphic SiGe layers into Si CMOS has prospects of improving the hole channel ...
Strained SiGe heterostructures possess transport properties superior to Si. Their integration in the...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
The unproved transport properties of new channel materials, such as Ge and III-V semiconductors, alo...
Channel length of metal oxide semiconductor field effect transistors (MOSFETs) are scaling below 20 ...
The constant pace of CMOS technology scaling has enabled continuous improvement in integrated-circui...
Rights Copyright © is held by the author. Digital access to this material is made possible by the Un...
This thesis demonstrates the advantages and disadvantages of investigated p-type SiGe MOSFETs with h...
Silicon Germanium (Si1-xGex) is an alloy semiconductor that has caught considerable attention of the...
For many decades, the semiconductor industry has miniaturized transistors,delivering increased compu...
High mobility channel materials are very promising for enhanced transport in future nanoscale MOSFET...
In the current CMOS sub-nano scale regime, hetero channel MOSFETs are one of the capable candidates ...
The development of nanoscale MOSFETs has given rise to increased attention paid to the role of paras...
This paper presents optimization techniques for 20 nm channel length novel Si/SiGe heterojunction p-...
Incorporation of pseudomorphic SiGe layers into Si CMOS has prospects of improving the hole channel ...
Incorporation of pseudomorphic SiGe layers into Si CMOS has prospects of improving the hole channel ...
Strained SiGe heterostructures possess transport properties superior to Si. Their integration in the...
Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer...
The unproved transport properties of new channel materials, such as Ge and III-V semiconductors, alo...
Channel length of metal oxide semiconductor field effect transistors (MOSFETs) are scaling below 20 ...
The constant pace of CMOS technology scaling has enabled continuous improvement in integrated-circui...