Characterization of semiconductor devices through scanned probe microscopies

Modern ULSI technology is currently pushing the limits of metal-oxide-semiconductor field-effect-transistor (MOSFET) gate dielectric stability by requiring thicknesses on the order of only a few tens of angstroms. At this thickness, even small levels of contamination may lead to undesirable or fatal device characteristics. Common techniques for detecting the effects of contaminants on MOSFET devices use, for example, gate oxide integrity (GOI) and capacitance vs. voltage (C-V) curves methods. Such methods, however, lack the spatial resolution required to characterize the effects of an isolated contaminant. Imaging techniques with high lateral resolution such as Atomic Force Microscopy (AFM) and Scanning Capacitance Microscopy (SCM) offer some information about both the local presence and effect of contaminating materials. Additionally, a new technique called Tunneling Atomic Force Microscopy (TAFM) has been developed to locally map and characterize the electric properties of thin oxides in order to study how contaminants interact with the oxide. This technique uses an AFM with a conducting tip to place a localized tip-sample bias across the oxide, causing quantum mechanical electron tunneling. The TAFM can be used in a constant current or constant voltage mode, yielding complementary information about the local electronic properties of the features in the oxide film. Also, by fixing the position of the tip above the feature and ramping the bias, one obtains an I-V curve that can be analyzed using metal-insulator-semiconductor (MIS) theory. An analysis of the AFM map, TAFM map, and I-V curves helps one to determine the nature of the bulge