Soft error study on DDR4 SDRAMs using a 480 MeV proton beam

This paper is a soft error study on logic upset in control logic, using a 480 MeV proton beam on commercial DDR4 SDRAM components from two different manufacturers. Samples with the same density and speed showed a 1.9x difference in logic cross section depending on the manufacturer. Compared to DDR3 SDRAM, DDR4 SDRAM from the same manufacturer showed about 45% SBU cross-section increase, and 17% logic upset decrease. To understand how the storage capacitance of down-scaling DDR technologies affects soft error, soft error bits were compared to retention weak bits. No evidence was found that indicated that retention weak bits were more sensitive to soft error.This work was supported in part by Cisco Systems, Inc., MOTIE (Ministry of Trade, Industry & Energy) (10052875), and KSRC (Korea Semiconductor Research Consortium) for the development of future semiconductor devices