This paper presents floating-point division algorithms and implementations forembedded VLIW integer processors. On those processors, there is no hardwarefloating-point unit, for cost reasons. But, for portability and/or accuracy reasons,a software FP emulation layer is sometime useful. Here, we focus onhigh-radix digit-recurrence algorithms for FP division on integer VLIW processorssuch as the ST200 from STMicroelectronics.Ce papier présente quelques algorithmes de division flottante et leur implantation pour des processeurs embarqués entiers de type VLIW. De tels processeurs ne possèdent pas d’unité flottante matérielle mais, pour des raisons de portabilité et/ou de précision, disposer d’une bibliothèque flottante est parfois ut...
International audienceThis paper presents an optimized software implementation of the reciprocal squ...
This assignment has been given by Defence Communication (DC) which is a division of Kongsberg Defenc...
We design a new radix 2 (i.e., serial, most significant digit first) floating-point divider which pe...
This paper presents floating-point division algorithms and implementations forembedded VLIW integer ...
License, which permits unrestricted use, distribution, and reproduction in any medium, provided the ...
Decimal floating point operations are important for applications that cannot tolerate errors from co...
This paper describes the hardware implementation methodologies of fixed point binary division algori...
This paper presents the sequential and pipelined designs of a double precision floating point divide...
Abstract—We present a radix-10 digit-recurrence algorithm for division using limited-precision multi...
International audienceRecently, some high-performance IEEE 754 single precision floating-point softw...
International audienceComputing cores to be implemented on FPGAs may involve divisions by small inte...
International audienceThis paper deals with the design and implementation of low latency software fo...
International audienceThis paper shows the details of an implementation of variable radix floating-p...
Abstract — A hardware algorithm for integer division is pro-posed. It is based on the digit-recurren...
Almost all recent microprocessors and DSP chips perform addition, subtraction, multiplication and di...
International audienceThis paper presents an optimized software implementation of the reciprocal squ...
This assignment has been given by Defence Communication (DC) which is a division of Kongsberg Defenc...
We design a new radix 2 (i.e., serial, most significant digit first) floating-point divider which pe...
This paper presents floating-point division algorithms and implementations forembedded VLIW integer ...
License, which permits unrestricted use, distribution, and reproduction in any medium, provided the ...
Decimal floating point operations are important for applications that cannot tolerate errors from co...
This paper describes the hardware implementation methodologies of fixed point binary division algori...
This paper presents the sequential and pipelined designs of a double precision floating point divide...
Abstract—We present a radix-10 digit-recurrence algorithm for division using limited-precision multi...
International audienceRecently, some high-performance IEEE 754 single precision floating-point softw...
International audienceComputing cores to be implemented on FPGAs may involve divisions by small inte...
International audienceThis paper deals with the design and implementation of low latency software fo...
International audienceThis paper shows the details of an implementation of variable radix floating-p...
Abstract — A hardware algorithm for integer division is pro-posed. It is based on the digit-recurren...
Almost all recent microprocessors and DSP chips perform addition, subtraction, multiplication and di...
International audienceThis paper presents an optimized software implementation of the reciprocal squ...
This assignment has been given by Defence Communication (DC) which is a division of Kongsberg Defenc...
We design a new radix 2 (i.e., serial, most significant digit first) floating-point divider which pe...