Degradation study of ultra-thin JVD silicon nitride MNSFETs

In this paper we discuss a new method for measuring border trap density (N-bt) in sub-micron transistors using the hysteresis in the drain current. We have used this method to measure N-bt in Jet Vapour Deposited (JVD) Silicon Nitride transistors (MNSFETs). We have extended this method to measure the energy and spatial distribution of border traps in these devices. The transient drain current varies linearly with logarthmic time. This suggests that tunneling is the dominant charge exchange mechanism of border traps. The pre-stress energy distribution is uniform whereas post-stress energy distribution shows a peak near the midgap