The First Compact Model o Determine V-T Distribution for DG-FinFET Due to LER

We report the first compact model to estimate the V-T distribution of double gate-FinFET due to line edge roughness. We derive closed-form expressions, representing the compact model, for: 1) mean and standard deviation of fin width (W-fin) in terms of geometrical and variability parameters of the FinFET; 2) V-T as a function of W-fin for uniform width fins; and 3) V-T in tapered fins using percolation. The V-T distribution produced from the compact model shows a good match with well-calibrated TCAD data and demonstrates an excellent accuracy (similar to 3mV rms error) for a wide range of scaling and variability parameters. The model is simple, platform independent, and similar to 10(4) X faster compared to TCAD. It enables intuitive understanding of design space for FinFET on the one hand, and accurate FinFET variability-aware circuits and system design on the other hand