In this letter, the authors demonstrate a vertical wrap-gated field-effect transistor based on InAs nanowires [Proc. DRC, 2005, p. 157]. The nanowires have a diameter of 80 nm and are grown using selective epitaxy; a matrix of typically 10 x 10 vertically standing wires is used as channel in the transistor. The authors measure current saturation at V-ds = 0.15 V (V-g = 0 V), and a high mobility, compared to the previous nanowire transistors, is deduced
III/V MOS transistors are currently attracting considerable attention. The main driving force is tha...
Recent decades have seen an exponential increase in the functionality of electronic circuits, allowi...
This thesis explores a novel transistor technology based on vertical InAs nanowires, which could be ...
In this letter, the authors demonstrate a vertical wrap-gated field-effect transistor based on InAs ...
In this letter, the authors demonstrate a vertical wrap-gated field-effect transistor based on InAs ...
We demonstrate a wrap-gated field effect transistor based on a matrix of vertically standing InAs na...
In this paper, we report on the development of a vertical wrap-gated field-effect transistor based o...
In this paper, we report on the development of a vertical wrap-gated field-effect transistor based o...
Field-effect transistors (FETs) based on semiconductor nanowires (Bryllert et al., 2005) have the po...
A new processing scheme for the fabrication of sub-100-nm-gate-length vertical nanowire transistors ...
InAs nanowire wrap-gate transistors have been fabricated in a vertical geometry using matrices of 11...
Abstract—We present results on fabrication and dc character-ization of vertical InAs nanowire wrap-g...
Gate-all-around field-effect transistors are realized with thin, single-crystalline, pure-phase InAs...
III/V MOS transistors are currently attracting considerable attention. The main driving force is tha...
Gate-all-around field-effect transistors are realized with thin, single-crystalline, pure-phase InAs...
III/V MOS transistors are currently attracting considerable attention. The main driving force is tha...
Recent decades have seen an exponential increase in the functionality of electronic circuits, allowi...
This thesis explores a novel transistor technology based on vertical InAs nanowires, which could be ...
In this letter, the authors demonstrate a vertical wrap-gated field-effect transistor based on InAs ...
In this letter, the authors demonstrate a vertical wrap-gated field-effect transistor based on InAs ...
We demonstrate a wrap-gated field effect transistor based on a matrix of vertically standing InAs na...
In this paper, we report on the development of a vertical wrap-gated field-effect transistor based o...
In this paper, we report on the development of a vertical wrap-gated field-effect transistor based o...
Field-effect transistors (FETs) based on semiconductor nanowires (Bryllert et al., 2005) have the po...
A new processing scheme for the fabrication of sub-100-nm-gate-length vertical nanowire transistors ...
InAs nanowire wrap-gate transistors have been fabricated in a vertical geometry using matrices of 11...
Abstract—We present results on fabrication and dc character-ization of vertical InAs nanowire wrap-g...
Gate-all-around field-effect transistors are realized with thin, single-crystalline, pure-phase InAs...
III/V MOS transistors are currently attracting considerable attention. The main driving force is tha...
Gate-all-around field-effect transistors are realized with thin, single-crystalline, pure-phase InAs...
III/V MOS transistors are currently attracting considerable attention. The main driving force is tha...
Recent decades have seen an exponential increase in the functionality of electronic circuits, allowi...
This thesis explores a novel transistor technology based on vertical InAs nanowires, which could be ...