Radiation-tolerant embedded memory using magnetic tunnel junctions /by Kenneth Joseph Hass.

Non-volatile memories occupy an important niche in the universe of solid state memory devices. They are able to retain their programmed state indefinitely without power, but can be reprogrammed as desired in situ. Aerospace applications have a significant need for non-volatile memories but they also present requirements that are not encountered in commercial electronics. In particular, many aerospace systems must be able to operate continuously and flawlessly in the natural radiation environment of space.;The recent development of practical spin-polarized magnetic tunneling junctions (MTJs) has made possible a new class of non-volatile memories, known collectively as magnetic RAM (MRAM). Information is stored as the orientation of magnetic fields in sub-micron ferromagnetic elements, which is expected to provide much higher resistance to the effects of ionizing radiation than memory technologies that rely on stored charge.;While commercial semiconductor designers are actively pursuing the development of bulk MRAM, where millions of bits of memory are incorporated into a single integrated circuit, there has been little research devoted to integrating magnetic memory elements with logic circuits. The goal of this research is to design such embedded magnetic memories with the additional requirement that they must be highly resistant to ionizing radiation.;This dissertation begins with an overview of the quantum phenomena at work in magnetic tunneling junctions, the natural radiation environment of space, and radiation effects in CMOS electronics. This leads into a discussion of the goals, constraints, and obstacles that must be considered when designing radiation-tolerant embedded magnetic memories. Prior art in this area is presented and evaluated.;Two novel memory circuits were created during this research. The first is a differential latch cell that uses the MTJs themselves to provide radiation tolerance. The second is a magnetic shadow latch that takes advantage of the bottom gate available in a double-gate silicon-on-insulator technology. The shadow latch concept is extensively studied and optimized. Finally, a new """"one-wire"""" programming method is described. This is a critical aspect of embedded magnetic memory, and limits its energy efficiency. Associated reliability issues are investigated, and various techniques are applied to optimize the circuits.Thesis (Ph. D., Electrical Engineering)--University of Idaho, May 2007