Add to ORKGSwitching amplifiers using Sigma-delta modulators have proven to be highly efficient but require high switching speeds. Implementing complete digital systems at the switching speed has prevented their use in higher speed applications. In this paper we propose a methodology for the parallelisation of sigma-delta modulators allowing for the partition of the switching amplifier into a low-speed and high speed sections. This will enable switching amplifiers to be used effectively at higher frequencies, and specifically for wireless applications
This thesis analyzes an amplifier architecture that combines a RF class D amplifier with a bandpass ...
As digital processors continue to reach new performance limits, the pressure on the interface betwee...
In this theses techniques for high-speed digital delta-sigma modulator(DDSM) structures are consider...
Switching amplifiers using Sigma-delta modulators have proven to be highly efficient but require hig...
In this paper a new technique of utilizing parallel sigma delta modulation for high frequency switc...
This work extends the Asynchronous ΣΔ Modulator and its Adaptive version to multi-level modulators, ...
Switching power amplifiers offer the potential for superior efficiencies if used at radio frequencie...
A large part of the power consumption for mobile communications can be allotted to power amplifiers....
The main goal of this paper is to develop a switching amplifier with optimized power efficiency for ...
textThe objective of this research is to explore circuit techniques and architectures suitable for i...
Over the past few years, there has been a growing need for wireless communications with higher data ...
Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which...
This work deals with multi-level switching amplifiers, in the context of high-efficiency power ampli...
Abstract: - This paper describes a new multi-level switching amplifier concept, targeting increased ...
In this paper a platform that implements the digital processing and RF carrier generation for class ...
This thesis analyzes an amplifier architecture that combines a RF class D amplifier with a bandpass ...
As digital processors continue to reach new performance limits, the pressure on the interface betwee...
In this theses techniques for high-speed digital delta-sigma modulator(DDSM) structures are consider...
Switching amplifiers using Sigma-delta modulators have proven to be highly efficient but require hig...
In this paper a new technique of utilizing parallel sigma delta modulation for high frequency switc...
This work extends the Asynchronous ΣΔ Modulator and its Adaptive version to multi-level modulators, ...
Switching power amplifiers offer the potential for superior efficiencies if used at radio frequencie...
A large part of the power consumption for mobile communications can be allotted to power amplifiers....
The main goal of this paper is to develop a switching amplifier with optimized power efficiency for ...
textThe objective of this research is to explore circuit techniques and architectures suitable for i...
Over the past few years, there has been a growing need for wireless communications with higher data ...
Power consumption is a key point in the design of high-speed switched capacitor (SC) circuits, which...
This work deals with multi-level switching amplifiers, in the context of high-efficiency power ampli...
Abstract: - This paper describes a new multi-level switching amplifier concept, targeting increased ...
In this paper a platform that implements the digital processing and RF carrier generation for class ...
This thesis analyzes an amplifier architecture that combines a RF class D amplifier with a bandpass ...
As digital processors continue to reach new performance limits, the pressure on the interface betwee...
In this theses techniques for high-speed digital delta-sigma modulator(DDSM) structures are consider...