International audienceMulticore system analysis requires efficient solutions for architectural parameter and scalability exploration. Long simulation time is the main drawback of current simulation approaches. In order to reduce the simulation time while keeping the accuracy levels, trace-driven simulation approaches have been developed. However, existing approaches do not allow multicore exploration or do not capture the behavior of multi-threaded programs. Based on the gem5 simulator, we developed a novel synchronization mechanism for multicore analysis based on the trace collection of synchronization events, instruction and dependencies. It allows efficient architectural parameter and scalability exploration with acceptable simulation sp...
Supercomputers’ evolution is at the source of both hardware and software challenges. In the quest fo...
The Sesame modeling and simulation framework aims at efficient system-level design space exploration...
The heritage of Moore's law has converged in a heterogeneous processor with a many-core and differen...
International audienceThe evolution of manycore sytems, forecasted to feature hundreds of cores by t...
International audienceArchitecture parameter exploration is one of the main analysis that needs to b...
Since the computational needs precipitously grow each year, HPC technology becomes a driving force f...
The number of transistors on an integrated circuit keeps doubling every two years. This increasing n...
International audienceIn order to study the performance of scheduling algorithms, simulators of para...
Computer architects heavily rely on software simulation to evaluate new and existing processor desig...
Architectural simulation is time-consuming, and the trend towards hundreds of cores is making sequen...
Writing well-performing parallel programs is challenging in the multi-core processor era. In additio...
The limited execution speed of current full system simulators restricts their applicability for dyna...
Fast and accurate processor simulation is essential in processor design.\ud Trace-driven simulation ...
Traditional software testing methods are inefficient for multithreaded software. In order to verify ...
Modern processors are becoming more complex and as features and application size increase, their eva...
Supercomputers’ evolution is at the source of both hardware and software challenges. In the quest fo...
The Sesame modeling and simulation framework aims at efficient system-level design space exploration...
The heritage of Moore's law has converged in a heterogeneous processor with a many-core and differen...
International audienceThe evolution of manycore sytems, forecasted to feature hundreds of cores by t...
International audienceArchitecture parameter exploration is one of the main analysis that needs to b...
Since the computational needs precipitously grow each year, HPC technology becomes a driving force f...
The number of transistors on an integrated circuit keeps doubling every two years. This increasing n...
International audienceIn order to study the performance of scheduling algorithms, simulators of para...
Computer architects heavily rely on software simulation to evaluate new and existing processor desig...
Architectural simulation is time-consuming, and the trend towards hundreds of cores is making sequen...
Writing well-performing parallel programs is challenging in the multi-core processor era. In additio...
The limited execution speed of current full system simulators restricts their applicability for dyna...
Fast and accurate processor simulation is essential in processor design.\ud Trace-driven simulation ...
Traditional software testing methods are inefficient for multithreaded software. In order to verify ...
Modern processors are becoming more complex and as features and application size increase, their eva...
Supercomputers’ evolution is at the source of both hardware and software challenges. In the quest fo...
The Sesame modeling and simulation framework aims at efficient system-level design space exploration...
The heritage of Moore's law has converged in a heterogeneous processor with a many-core and differen...