This work involved the study and formulation of the 3D ultrasound frontend system specifications for various blocks in order to identify the key design bottlenecks and possible opportunities for innovation for next-gen Philips Ultrasound probes. The second part of the project focused on the schematic design of a high resolution, high speed, low power SAR ADC in 65nm CMOS technology based upon the previous system level derived specifications
This work introduces an architecture that is capable of reducing the number of cables coming out of ...
In this article, an application-specific integrated circuit (ASIC) for 3-D, high-frame-rate ultrasou...
In sensing systems, ADCs are widely used in sensor interface circuits to convert analog signals to d...
This work involved the study and formulation of the 3D ultrasound frontend system specifications for...
This thesis presents a Low-Power Area-Ecient SAR-Assisted Hybrid ADC for ultra-sound imaging systems...
A 9-bit 50MS/s SAR ADC with a simulated power consumption of 24.5 µW was designed for this thesis. S...
Area and power consumption are two main concerns for the electronics towards the digitalization of i...
This paper presents a calibration-free, 16-channel, 14-bit, 50-MS/s, pipelined successive approximat...
Successive Approximation (SAR) Analog-to-Digital Converters (ADCs) are among the most energy efficie...
Power consumption is one of the main design constraints in today’s integrated circuits. For systems ...
Design of a low power Successive Approximation Register Analog to Digital Converter (SAR ADC) in 45n...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...
Photoacoustic (PA) imaging and sensing based on optical excitation and acoustic detection are emergi...
This master?s thesis presents the design, implementation and layout of an ultra-low power 9-bit 1 kS...
This paper presents a fully differential 12-bit SAR ADC developed for high-voltage CMOS sensors. The...
This work introduces an architecture that is capable of reducing the number of cables coming out of ...
In this article, an application-specific integrated circuit (ASIC) for 3-D, high-frame-rate ultrasou...
In sensing systems, ADCs are widely used in sensor interface circuits to convert analog signals to d...
This work involved the study and formulation of the 3D ultrasound frontend system specifications for...
This thesis presents a Low-Power Area-Ecient SAR-Assisted Hybrid ADC for ultra-sound imaging systems...
A 9-bit 50MS/s SAR ADC with a simulated power consumption of 24.5 µW was designed for this thesis. S...
Area and power consumption are two main concerns for the electronics towards the digitalization of i...
This paper presents a calibration-free, 16-channel, 14-bit, 50-MS/s, pipelined successive approximat...
Successive Approximation (SAR) Analog-to-Digital Converters (ADCs) are among the most energy efficie...
Power consumption is one of the main design constraints in today’s integrated circuits. For systems ...
Design of a low power Successive Approximation Register Analog to Digital Converter (SAR ADC) in 45n...
In recent years, there has been a growing need for Successive Approximation Register (SAR) Analog-to...
Photoacoustic (PA) imaging and sensing based on optical excitation and acoustic detection are emergi...
This master?s thesis presents the design, implementation and layout of an ultra-low power 9-bit 1 kS...
This paper presents a fully differential 12-bit SAR ADC developed for high-voltage CMOS sensors. The...
This work introduces an architecture that is capable of reducing the number of cables coming out of ...
In this article, an application-specific integrated circuit (ASIC) for 3-D, high-frame-rate ultrasou...
In sensing systems, ADCs are widely used in sensor interface circuits to convert analog signals to d...