Challenges to ultralow-power semiconductor device operation

International audienceThis chapter focuses on the main trends, challenges, limits, and possible solutions for ultra low‐power nanoscale devices in the complementary metal‐oxide‐semiconductor (CMOS) and beyond‐CMOS arena, including novel materials, ultrathin films, and multigates. In the field of MOSFETs, several very interesting advances have been recently reported. Ultrathin semiconductor films and 3D‐field‐effect transistors (FETs) can improve sub‐20 nm CMOS node performance and substantially reduce supply voltage and short channel effects. One are facing dramatic challenges dealing with future nanoscale devices, including performance, power consumption, new materials, device integration, interconnects, ultimate technological processes, and novel functionalities, needing disruptive approaches and inducing fundamental trade‐offs for future ICs and nanosystems. This chapter reviewed recent advances and promising solutions for future ultralow power devices combining novel materials and innovative device architectures, including 2D layers, transition‐metal dichalcogenides (TMDs), heterostructures and quantum wells using strained Si, Ge, and III‐V thin films, as well as multigate, nanowire, CNT transistors, and tunnel FETs