This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthesizer includes a novel mixed-signal voltage-controlled oscillator (VCO) with a direct frequency presetting circuit. The frequency presetting circuit can greatly speed up the lock-in process by accurately the presetting oscillation frequency of the VCO. We fully integrated the synthesizer in standard 0.35 mu m, 3.3 V complementary metal-oxide-semiconductors (CMOS) process. The entire chip area is only 0.4 mm(2). The measured results demonstrate that the synthesizer can speed up the lock-in process significantly and the lock-in time is less than 10 mu s over the entire oscillation frequency range. The measured phase noise of the synthesizer is ...
Abstract—Phase locked loops find wide application in several modern applications mostly in advance c...
[[abstract]]A phase-locked loop (PLL) with two different delay feedback paths is presented. It provi...
This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devi...
This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthe...
This paper proposes a smart frequency presetting technique for fast lock-in LC-PLL frequency synthes...
Abstract—This paper deals with different approaches to design Phase Locked Loop (PLL) frequency synt...
This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-signal V...
A new frequency synthesizer based on combining the analog phase-locked loop (PLL) and the all digita...
Due to the character of the original source materials and the nature of batch digitization, quality ...
Includes bibliographical references (page 65)This paper is about the nature of the phase-locked\ud l...
Abstract- A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band application...
A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band applications is prese...
This research describes the design & implementation of frequency synthesizer using single loop Phase...
DoctorThis thesis presents a fast-lock 2.4GHz fractional-N phase-locked loop (PLL) for ultra-low-pow...
In this thesis, the design of a fully integrated RF CMOS phase-locked loop is explored. The goal of ...
Abstract—Phase locked loops find wide application in several modern applications mostly in advance c...
[[abstract]]A phase-locked loop (PLL) with two different delay feedback paths is presented. It provi...
This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devi...
This paper proposes a novel, fast lock-in, phase-locked loop (PLL) frequency synthesizer. The synthe...
This paper proposes a smart frequency presetting technique for fast lock-in LC-PLL frequency synthes...
Abstract—This paper deals with different approaches to design Phase Locked Loop (PLL) frequency synt...
This paper proposes a fast-settling frequency-presetting PLL frequency synthesizer. A mixed-signal V...
A new frequency synthesizer based on combining the analog phase-locked loop (PLL) and the all digita...
Due to the character of the original source materials and the nature of batch digitization, quality ...
Includes bibliographical references (page 65)This paper is about the nature of the phase-locked\ud l...
Abstract- A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band application...
A phase-locked loop (PLL) frequency synthesizer architecture for multiple-band applications is prese...
This research describes the design & implementation of frequency synthesizer using single loop Phase...
DoctorThis thesis presents a fast-lock 2.4GHz fractional-N phase-locked loop (PLL) for ultra-low-pow...
In this thesis, the design of a fully integrated RF CMOS phase-locked loop is explored. The goal of ...
Abstract—Phase locked loops find wide application in several modern applications mostly in advance c...
[[abstract]]A phase-locked loop (PLL) with two different delay feedback paths is presented. It provi...
This paper proposes a novel phase-locked loop (PLL) frequency synthesizer using single-electron devi...