Scheduling frames with offsets has been shown in the literature to be very beneficial for reducing response times in real-time networks because it allows the workload to be better spread over time and thus to reduce peaks of load. In the specific case of CAN, the response time is mainly related to the priority assignment, but offsets can still improve the achievable bus load. When it exists a global clock, a good offsets assignment leads to a TDMA medium access. When each node have its own local clock the use of offsets still spreads the workload over time. However, on CAN, global clock is hardly implemented in practice since using a global clock often requires dedicated hardware and complicates the sharing of the bus with non-synchronized ...
In this paper, we model and analyse the timing performance of an extended AFDX standard, incorporati...
A homogeneous avionic communication architecture based on the AFDX supporting mixed-criticality appl...
Several modern multi-core architectures support the dynamic control of the CPU's clock rate, allowin...
Scheduling frames with offsets has been shown in the literature to be very beneficial for reducing r...
Scheduling frames with offsets has been shown in the literature to be very beneficial for reducing r...
Recent advances have resulted in queue-based algorithms for medium access control which operate in a...
One of the main issues in using a Low Earth Orbit (LEO) satellite constellation to extend a Low-Powe...
In this paper, we study the joint phase and timing estimation problem in Faster-than-Nyquist (FTN) s...
The Time Sensitive Networking (TSN) task group has added a set of mechanisms to Ethernet in order to...
Switched Ethernet is becoming a de-facto standard in industrial and embedded networks. Many of today...
Satellite transmissions can suffer from high channel impairments, especially on the link between a s...
This paper aims at quantifying the impact of a default TCP option, known as Delayed Acknowledgment (...
Recent research on opportunistic schedulers for wireless data transmissionhas shown that link utiliz...
Time management services are one of the key features of the High Level Architecture (HLA) IEEE simul...
In this paper we address a practical performance issue arising inwireless ad hoc networks using time...
In this paper, we model and analyse the timing performance of an extended AFDX standard, incorporati...
A homogeneous avionic communication architecture based on the AFDX supporting mixed-criticality appl...
Several modern multi-core architectures support the dynamic control of the CPU's clock rate, allowin...
Scheduling frames with offsets has been shown in the literature to be very beneficial for reducing r...
Scheduling frames with offsets has been shown in the literature to be very beneficial for reducing r...
Recent advances have resulted in queue-based algorithms for medium access control which operate in a...
One of the main issues in using a Low Earth Orbit (LEO) satellite constellation to extend a Low-Powe...
In this paper, we study the joint phase and timing estimation problem in Faster-than-Nyquist (FTN) s...
The Time Sensitive Networking (TSN) task group has added a set of mechanisms to Ethernet in order to...
Switched Ethernet is becoming a de-facto standard in industrial and embedded networks. Many of today...
Satellite transmissions can suffer from high channel impairments, especially on the link between a s...
This paper aims at quantifying the impact of a default TCP option, known as Delayed Acknowledgment (...
Recent research on opportunistic schedulers for wireless data transmissionhas shown that link utiliz...
Time management services are one of the key features of the High Level Architecture (HLA) IEEE simul...
In this paper we address a practical performance issue arising inwireless ad hoc networks using time...
In this paper, we model and analyse the timing performance of an extended AFDX standard, incorporati...
A homogeneous avionic communication architecture based on the AFDX supporting mixed-criticality appl...
Several modern multi-core architectures support the dynamic control of the CPU's clock rate, allowin...