A low cost nanosphere lithography method for patterning and generation of semiconductor nanostructures provides a potential alternative to the conventional top-down fabrication techniques. Forests of silicon pillars of sub-500 nm diameter and with an aspect ratio up to 10 were fabricated using a combination of the nanosphere lithography and deep reactive ion etching techniques. The nanosphere etch mask coated silicon substrates were etched using oxygen plasma and a timemultiplexed “Bosch” process to produce nanopillars of different length, diameter and separation. Scanning electron microscopy data indicate that the silicon etch rates with the nanoscale etch masks decrease linearly with increasing aspect ratio of the resulting etch structure...
Nanosphere lithography, a technique of generating hexagonally packed monolayers with nanospheres, ha...
This paper discusses the integration of nanosphere lithography (NSL) with other fabrication techniqu...
A fabrication process of silicon hierarchical nanopillar arrays (NPAs) based on the self-assembled c...
A low cost nanosphere lithography method for patterning and generation of semiconductor nanostructur...
A low cost nanosphere lithography method for patterning and generation of semiconductor nanostructur...
A novel, simple and in situ hard mask technology that can be used to develop high aspect ratio silic...
How surface geometries can be selectively manipulated through nanosphere lithography (NSL) is discus...
By combining nanosphere lithography with template stripping, silicon wafers were patterned with hexa...
How surface geometries can be selectively manipulated through nanosphere lithography (NSL) is discus...
We report for the first time a facile lithography-free approach for fabricating nanopillars over lar...
Nanospheres made of organic polymer have been applied to generate various patterning mask in fabrica...
Nanosphere lithography (NSL) has been demonstrated to be a feasible, alternative technique for the f...
We present a method to fabricate well-controlled periodic silicon nanopillars (Si NPs) in hexagonal ...
The fabrication of ordered arrays of nanoporous Si nanopillars with and without nanoporous base and ...
The considerable interest in nanomaterials and nanotechnology over the last decade is attributed to ...
Nanosphere lithography, a technique of generating hexagonally packed monolayers with nanospheres, ha...
This paper discusses the integration of nanosphere lithography (NSL) with other fabrication techniqu...
A fabrication process of silicon hierarchical nanopillar arrays (NPAs) based on the self-assembled c...
A low cost nanosphere lithography method for patterning and generation of semiconductor nanostructur...
A low cost nanosphere lithography method for patterning and generation of semiconductor nanostructur...
A novel, simple and in situ hard mask technology that can be used to develop high aspect ratio silic...
How surface geometries can be selectively manipulated through nanosphere lithography (NSL) is discus...
By combining nanosphere lithography with template stripping, silicon wafers were patterned with hexa...
How surface geometries can be selectively manipulated through nanosphere lithography (NSL) is discus...
We report for the first time a facile lithography-free approach for fabricating nanopillars over lar...
Nanospheres made of organic polymer have been applied to generate various patterning mask in fabrica...
Nanosphere lithography (NSL) has been demonstrated to be a feasible, alternative technique for the f...
We present a method to fabricate well-controlled periodic silicon nanopillars (Si NPs) in hexagonal ...
The fabrication of ordered arrays of nanoporous Si nanopillars with and without nanoporous base and ...
The considerable interest in nanomaterials and nanotechnology over the last decade is attributed to ...
Nanosphere lithography, a technique of generating hexagonally packed monolayers with nanospheres, ha...
This paper discusses the integration of nanosphere lithography (NSL) with other fabrication techniqu...
A fabrication process of silicon hierarchical nanopillar arrays (NPAs) based on the self-assembled c...