A radiation hardened static RAM for high-energy physics experiments

This paper presents the design of a static RAM cell in 65 nm CMOS technology. A good level of radiation hardness against cumulative dose effects can easily achieved by using a 65 nm technology, as the oxide thickness is thin enough to provide intrinsic radiation hardness against total ionizing dose. Single event effects can be mitigated by using ad-hoc techniques. The SRAM is based on Dual Interlocked cells (DICE) to reduce the upset occurrence in the internal node of memory latches. Electrical simulations demonstrate a very good tolerance to single event effects