The soft error rates of memories are increased by high-energy particles as technology shrinks. Single-error correction codes (SEC), scrubbing techniques, and interleaving distance (ID) schemes are the most common approaches for protecting memories from soft errors. It is essential to employ analytical models to guide the selection of the interleaving distance; relying on rough estimates may lead to unreasonable design choices. The analytical model proposed in this paper includes the row clustering effects of the accumulated upsets, and was able to estimate the failure probability with a difference of only 0.015% compared to the test data for a 45 nm static random access memory (SRAM) design.Manuscript received March 09, 2011; revised May 27...
Modern nanoscale devices with storage capacity typically implement error correction codes (ECCs) in ...
The Soft-Error (SE) reliability and the effects of Negative Bias Temperature Instability (NBTI) in d...
Defects in semiconductor memory chips and errors of their functioning are of interest to both manufa...
The significance of multiple cell upsets (MCUs) is revealed by sharing the soft-error test results i...
Ternary content addressable memory (TCAM) is more susceptible to soft errors than static random acce...
Multiple bit upsets (MBU) are analyzed from the perspective of the number of accessed blocks (NAB) i...
Abstract—The reliability of memory systems that are exposed to soft errors has been studied in the p...
UnrestrictedWith aggressive technology scaling, radiation-induced soft errors have become a major th...
2012-01-31Benchmarking the FIT (failures in time of 1E9 hours) rates of caches due to soft errors is...
Soft error in static random-access memory (SRAM) caused by radiation has been shown to be one of the...
SUMMARY This paper proposes a soft-error model for accurately esti-mating reliability of a computer ...
Advances in spaceborne vehicular technology have made possible the long-life duration of the mission...
Advances in spaceborne vehicular technology have made possible the long-life duration of the mission...
We developed a tool for the reliability analysis of SEU effects on the configuration memory of Xili...
This article presents an analysis of the reliability of memories protected with Built-in Current Sen...
Modern nanoscale devices with storage capacity typically implement error correction codes (ECCs) in ...
The Soft-Error (SE) reliability and the effects of Negative Bias Temperature Instability (NBTI) in d...
Defects in semiconductor memory chips and errors of their functioning are of interest to both manufa...
The significance of multiple cell upsets (MCUs) is revealed by sharing the soft-error test results i...
Ternary content addressable memory (TCAM) is more susceptible to soft errors than static random acce...
Multiple bit upsets (MBU) are analyzed from the perspective of the number of accessed blocks (NAB) i...
Abstract—The reliability of memory systems that are exposed to soft errors has been studied in the p...
UnrestrictedWith aggressive technology scaling, radiation-induced soft errors have become a major th...
2012-01-31Benchmarking the FIT (failures in time of 1E9 hours) rates of caches due to soft errors is...
Soft error in static random-access memory (SRAM) caused by radiation has been shown to be one of the...
SUMMARY This paper proposes a soft-error model for accurately esti-mating reliability of a computer ...
Advances in spaceborne vehicular technology have made possible the long-life duration of the mission...
Advances in spaceborne vehicular technology have made possible the long-life duration of the mission...
We developed a tool for the reliability analysis of SEU effects on the configuration memory of Xili...
This article presents an analysis of the reliability of memories protected with Built-in Current Sen...
Modern nanoscale devices with storage capacity typically implement error correction codes (ECCs) in ...
The Soft-Error (SE) reliability and the effects of Negative Bias Temperature Instability (NBTI) in d...
Defects in semiconductor memory chips and errors of their functioning are of interest to both manufa...