Multiple bit upsets (MBU) are analyzed from the perspective of the number of accessed blocks (NAB) in multiple memory block structures. The NAB represents the number of accessed blocks for a single memory operation. Statistical model of the MBU with regards to the NAB is developed, and its correlation to the test results presented. The tests were performed with neutron irradiation facility at The Svedberg Laboratory. The NAB in structure of multiple memory blocks is one of the most important parameter in determining the reliability of the memory. Although multiple cell upsets can be effectively spread out as multiple single bit upsets by interleaving distance scheme, the word failure rates are increased by combination of multiple events fro...
Methodologies are proposed for in-depth statistical analysis of Single Event Upset data. The motivat...
This paper addresses the problem of hardware tasks reliability estimation in harsh environments. A n...
Abstract—This paper proposes a technique that mitigates multi-bit-upset (MBU) in multi-bit-latch (MB...
Abstract—The reliability of memory systems that are exposed to soft errors has been studied in the p...
The soft error rates of memories are increased by high-energy particles as technology shrinks. Singl...
The significance of multiple cell upsets (MCUs) is revealed by sharing the soft-error test results i...
Modern nanoscale devices with storage capacity typically implement error correction codes (ECCs) in ...
International audienceWhile single bit upsets on memories and storage elements are mitigated with ei...
2012-01-31Benchmarking the FIT (failures in time of 1E9 hours) rates of caches due to soft errors is...
Ternary content addressable memory (TCAM) is more susceptible to soft errors than static random acce...
This article presents an analysis of the reliability of memories protected with Built-in Current Sen...
International audienceTechnological advances allow the production of increasingly complex electronic...
Reliability is a critical issue for memories. Radiation particles that hit the device can cause erro...
International audienceThis paper addresses a well-known problem that occurs when memories are expose...
During neutron irradiation of 4-Mb SRAMs, large-scale multiple cell upsets (MCUs) were observed. The...
Methodologies are proposed for in-depth statistical analysis of Single Event Upset data. The motivat...
This paper addresses the problem of hardware tasks reliability estimation in harsh environments. A n...
Abstract—This paper proposes a technique that mitigates multi-bit-upset (MBU) in multi-bit-latch (MB...
Abstract—The reliability of memory systems that are exposed to soft errors has been studied in the p...
The soft error rates of memories are increased by high-energy particles as technology shrinks. Singl...
The significance of multiple cell upsets (MCUs) is revealed by sharing the soft-error test results i...
Modern nanoscale devices with storage capacity typically implement error correction codes (ECCs) in ...
International audienceWhile single bit upsets on memories and storage elements are mitigated with ei...
2012-01-31Benchmarking the FIT (failures in time of 1E9 hours) rates of caches due to soft errors is...
Ternary content addressable memory (TCAM) is more susceptible to soft errors than static random acce...
This article presents an analysis of the reliability of memories protected with Built-in Current Sen...
International audienceTechnological advances allow the production of increasingly complex electronic...
Reliability is a critical issue for memories. Radiation particles that hit the device can cause erro...
International audienceThis paper addresses a well-known problem that occurs when memories are expose...
During neutron irradiation of 4-Mb SRAMs, large-scale multiple cell upsets (MCUs) were observed. The...
Methodologies are proposed for in-depth statistical analysis of Single Event Upset data. The motivat...
This paper addresses the problem of hardware tasks reliability estimation in harsh environments. A n...
Abstract—This paper proposes a technique that mitigates multi-bit-upset (MBU) in multi-bit-latch (MB...