A Mask Generation Approach to Double Patterning Technology with Inverse Lithography

Pattern reduction has generated much interest in development effective methods of reducing the feature Sizes Of microelectronic and data-storage devices. For below-32-nm node technology, the bottom-up approach, namely, self-assembly, has obstacles Such as the insufficient Support of processes and mass production, and the top-down approaches. namely, photolithography, the extremely ultraviolet (EUV) technique, and high-index fluid-based immersion ArF lithography. are Still under development. As one of the solutions for below-32 nm node technology. double patterning technology (DPT) has been researched. In this paper. we analytically report that the DPT pattern is 3/2 times denser than the double exposure technology (DET) pattern. and three times denser than the single-exposure pattern. An algorithm of the inverse lithography technology (ILT) based oil not mathematical functions but pixels and the lithography model is described and simulated. An algorithm of the DPT mask design with ILT is described in terms of how to use this ILT method in an integrated Computational lithography platform to handle the DPT. For its accuracy, its simulation results are compared with the simulation results obtained Without ILT and with the conventional serif optical proximity correction (OPC). The ILT results are better than other results. Hence, the ILT based on pixels and the lithography model and its application algorithm of DIPT call reduce the design complexity of mask design and the cost of production of DPT for below 32 run half pitch pattern generation.This research was supported by the Ministry of Information and Communication (MIC), Korea, under the Information Technology Research Center (ITRC) support program supervised by the Institute of Information Technology Advancement (IITA) (IITA-2008-C109008010030)