While many block replacement algorithms for buffer caches have been proposed to address the well-known drawbacks of the LRU algorithm, they are not robust and cannot maintain an consistent performance improvement over all workloads. This paper proposes a novel and simple replacement scheme, called RACE (Robust Adaptive buffer Cache management schemE), which differentiates the locality of I/O streams by actively detecting access patterns inherently exhibited in two correlated spaces: the discrete block space of program contexts from which I/O requests are issued and the continuous block space within files to which I/O requests are addressed. This scheme combines global I/O regularities of an application and local I/O regularities of individu...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
Memory latency has become an important performance bottleneck in current microprocessors. This probl...
While many block replacement algorithms for buffer caches have been proposed to address the well-kno...
As buffer cache is used to overcome the speed gap between processor and storage devices, performance...
This paper presents a Least Popularly Used buffer cache algorithm to exploit both temporal locality ...
Block replacement refers to the process of selecting a block of data or a cache line to be evicted o...
In traditional file system implementations, the Least Recently Used (LRU) block replacement scheme i...
In traditional file system implementations, the Least Recently Used (LRU) block replacement scheme i...
To overcome the speed gap between processors and disks, many computer systems utilize buffer cache l...
Abstract. Legacy buffer cache management schemes for multimedia server are grounded at the assumptio...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
Recent studies have shown that cache partitioning is an efficient technique to improve throughput, f...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
One of the most important problems in improving file system performance is to design effective block...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
Memory latency has become an important performance bottleneck in current microprocessors. This probl...
While many block replacement algorithms for buffer caches have been proposed to address the well-kno...
As buffer cache is used to overcome the speed gap between processor and storage devices, performance...
This paper presents a Least Popularly Used buffer cache algorithm to exploit both temporal locality ...
Block replacement refers to the process of selecting a block of data or a cache line to be evicted o...
In traditional file system implementations, the Least Recently Used (LRU) block replacement scheme i...
In traditional file system implementations, the Least Recently Used (LRU) block replacement scheme i...
To overcome the speed gap between processors and disks, many computer systems utilize buffer cache l...
Abstract. Legacy buffer cache management schemes for multimedia server are grounded at the assumptio...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
Recent studies have shown that cache partitioning is an efficient technique to improve throughput, f...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
One of the most important problems in improving file system performance is to design effective block...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
The full text of this article is not available on SOAR. WSU users can access the article via IEEE Xp...
Memory latency has become an important performance bottleneck in current microprocessors. This probl...