Training Memristors for Reliable Computing.

The computation goals of the digital computing world have been segmented into different factions. The goals are no longer rooted in a purely speed/performance standpoint as added requirements point to much needed interest in power awareness. This need for technological advancement has pushed researchers into a CMOS+X field, whereby CMOS transistors are utilized with emerging device technology in a hybrid space to combine the best of both worlds. This dissertation focuses on a CMOS+Memristor approach to computation since memristors have been proposed for a large application space from digital memory and digital logic to neuromorphic and self-assembling circuits. With the growth in application space of memristors comes the need to bridge the gap between complex memristor-based system proposals and reliably computing with memristors in the face of the technological difficulties with which it is associated. In order to account for these issues, research has to be pushed on two fronts. The first is from the processing viewpoint, in order to have a better control on the fabrication process and increase device yield. The second is from a circuits and architecture technique and how to tolerate the effects of a non-ideal process. This thesis takes the approach of the latter in order to provide a pathway to realizing the many applications suggested for the memristor. Specifically, three application spaces are investigated. The first is a neuromorphic approach, whereby spike-timing-dependent-plasticity (STDP) can be combined with memristors in order to withstand noise in circuits. We show that the analog approach to STDP implementation with memristors is superior to a digital-only approach. The second application is in memory; specifically, we show a procedure to program and erase a memristor memory. The procedure is proven to have an adaptive scheme that makes accessing the memristor memory more reliable. The third approach is a Q-Learning based training in order to re-emphasize that reliably using memristors may require not knowing the precise resistance of each device, but instead working with relative magnitudes of devices. This dissertation argues for the adoption of training methods for memristors that exhibit relative magnitudes in order to overcome reliability issues.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/97890/1/idong_1.pd