Lossless Circuit Layout Image Compression Algorithms for Multiple Electron Beam Direct Write Lithography Systems.

As technology develops, electronic devices are becoming faster, more power efficient, and smaller. All of these technological advances were possible because improvements in photolithography processes enabled the fabrication of smaller microelectronic circuits. In order to continue these technological advances, many engineers have been introducing alternative lithographical methods. Among them, Multiple Electron Beam is considered a strong candidate because of its high resolution as well as cost efficiency. However, there are more problems that we have to solve before MEB can replace conventional lithography systems, and one of these is the data delivery issue. For MEB systems to maintain sufficient throughput, many bits must be transmitted simultaneously to the electron beam writer array. This raises the question of how to provide the massive layout image data to the MEB systems. Because of a bandwidth shortage between the storage where the layer images are deposited and the MEB system, obtaining competitive throughput using a MEB system is not possible with conventional data delivery methods. In this thesis, we introduce a data delivery system using lossless image compression to solve the data delivery issue. By transmitting a compressed layout image and quickly decompressing it on-the-fly at the e-beam writer array of an MEB system, we can transmit the huge layout image through a bandwidth limited channel. Our compression algorithm is inspired by the compactness of the GDSII/OASIS format and is designed to take advantage of ideas like corner representation and the copying of repeated structures. However, we avoid the complex flattening and rasterizing processes and offer a simple decoding process. In order to take advantage of the repeated structures, we propose an algorithm that discovers the frequent structures from the layout description as well as the layout image and replace the discovered structures with a simpler representation. In order to make an efficient corner representation while maintaining a simple decoding process, we introduce a transformation which represents the corner points efficiently combined with an entropy encoder. The proposed compression algorithm provides a high compression performance while having a simple decoder architecture which enables the decoding process to be handled as an add-on hardware.PhDElectrical Engineering-SystemsUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttp://deepblue.lib.umich.edu/bitstream/2027.42/96038/1/xosh_1.pd