In this paper, we present an architecture named REDEFINE HyperCell Multicore (RHyMe) designed to efficiently realize HPC application kernels, such as loops. RHyMe relies on the compiler to generate the meta-data for its functioning. Most of the orchestration activity for executing kernels is governed by compiler generated meta-data made use of at runtime. In RHyMe, macro operations can be realized as a hardware overlay of MIMO operations on hardware structures called HyperCells. While a HyperCell enables exploiting fine-grain instruction level and pipeline parallelism, coarse-grain parallelism is exploited among multiple HyperCells. Regularity exhibited by computations such as loops results in efficient usage of simple compute hardware such...
In the last 15 years we have seen, as a response to power and thermal limits for current chip techno...
BLIS is a new framework for rapid instantiation of the BLAS. We describe how BLIS extends the “GotoB...
The upcoming generation of system software for High Performance Computing is expected to provide a r...
In this paper, we present an architecture named REDEFINE HyperCell Multicore (RHyMe) designed to eff...
In this paper, we present a compilation flow for HPC kernels on the REDEFINE coarse-grain reconfigur...
Modern compilers offer more and more capabilities to automatically parallelize code-regions if these...
As high-performance computing (HPC) systems advance towards exascale (10^18 operations per second), ...
We propose a radically new, biologically inspired, model of extreme scale computer on which ap-plica...
International audienceModular multiplication is the most costly and common operation in hyper-ellipt...
The increasing demand for low-power and high-performance multimedia embedded systems has motivated t...
Abstract—Current tools for High-Level Synthesis (HLS) excel at exploiting Instruction-Level Parallel...
Spatial computing architectures promise a major stride in performance and energy efficiency over the...
International audienceThis paper presents a new method to parallelize programs, adapted to manycore ...
Operating systems have historically been implemented as independent layers between hardware and appl...
International audienceEnabling HPC applications to perform efficiently when invoking multiple parall...
In the last 15 years we have seen, as a response to power and thermal limits for current chip techno...
BLIS is a new framework for rapid instantiation of the BLAS. We describe how BLIS extends the “GotoB...
The upcoming generation of system software for High Performance Computing is expected to provide a r...
In this paper, we present an architecture named REDEFINE HyperCell Multicore (RHyMe) designed to eff...
In this paper, we present a compilation flow for HPC kernels on the REDEFINE coarse-grain reconfigur...
Modern compilers offer more and more capabilities to automatically parallelize code-regions if these...
As high-performance computing (HPC) systems advance towards exascale (10^18 operations per second), ...
We propose a radically new, biologically inspired, model of extreme scale computer on which ap-plica...
International audienceModular multiplication is the most costly and common operation in hyper-ellipt...
The increasing demand for low-power and high-performance multimedia embedded systems has motivated t...
Abstract—Current tools for High-Level Synthesis (HLS) excel at exploiting Instruction-Level Parallel...
Spatial computing architectures promise a major stride in performance and energy efficiency over the...
International audienceThis paper presents a new method to parallelize programs, adapted to manycore ...
Operating systems have historically been implemented as independent layers between hardware and appl...
International audienceEnabling HPC applications to perform efficiently when invoking multiple parall...
In the last 15 years we have seen, as a response to power and thermal limits for current chip techno...
BLIS is a new framework for rapid instantiation of the BLAS. We describe how BLIS extends the “GotoB...
The upcoming generation of system software for High Performance Computing is expected to provide a r...