© 2004 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.DOI: 10.1109/LPT.2004.824623The lengths beyond which board-level optical waveguides are capable of transferring a larger number of bits per second than electrical interconnects are found for various technology generations. As technology scales from the 130-nm technology node to the 45-nm technology node, the partition length falls from 29 to 8.3 cm due to seve...
Abstract—High-bandwidth interchip optical interconnect ar-chitectures have the potential to address ...
The evolution of integrated circuit technology is causing system designs to move towards communicati...
This paper is focused on the latency and power dissipation in clock systems, which should be lower w...
We show that there is a limit to the total number of bits per second, B, of information that can flo...
Electrical interconnects are becoming a bottleneck in the way towards meeting future performance req...
Chip I/O pins are an increasingly limited resource and significantly affect the performance, power a...
Cataloged from PDF version of article.We show that there is a limit to the total number of bits per ...
© 2005 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
Optical interconnect is claimed to have signi¯cant advantages over electrical interconnect due to th...
Compared with electrical interconnects, optical interconnects offer several advantages, such as high...
Cataloged from PDF version of article.Several approaches to three-dimensional integration of convent...
The various arguments for introducing optical interconnections to silicon CMOS chips are summarized,...
Inter-chip input-output (I/O) communication bandwidth demand, which rapidly scaled with integrated c...
Cataloged from PDF version of article.By systematically examining the tree of possibilities for opto...
Cette thèse vise à définir les challenges que les solutions optoélectroniques devront relever pour r...
Abstract—High-bandwidth interchip optical interconnect ar-chitectures have the potential to address ...
The evolution of integrated circuit technology is causing system designs to move towards communicati...
This paper is focused on the latency and power dissipation in clock systems, which should be lower w...
We show that there is a limit to the total number of bits per second, B, of information that can flo...
Electrical interconnects are becoming a bottleneck in the way towards meeting future performance req...
Chip I/O pins are an increasingly limited resource and significantly affect the performance, power a...
Cataloged from PDF version of article.We show that there is a limit to the total number of bits per ...
© 2005 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for a...
Optical interconnect is claimed to have signi¯cant advantages over electrical interconnect due to th...
Compared with electrical interconnects, optical interconnects offer several advantages, such as high...
Cataloged from PDF version of article.Several approaches to three-dimensional integration of convent...
The various arguments for introducing optical interconnections to silicon CMOS chips are summarized,...
Inter-chip input-output (I/O) communication bandwidth demand, which rapidly scaled with integrated c...
Cataloged from PDF version of article.By systematically examining the tree of possibilities for opto...
Cette thèse vise à définir les challenges que les solutions optoélectroniques devront relever pour r...
Abstract—High-bandwidth interchip optical interconnect ar-chitectures have the potential to address ...
The evolution of integrated circuit technology is causing system designs to move towards communicati...
This paper is focused on the latency and power dissipation in clock systems, which should be lower w...