© 2010 American Vacuum Society. This article may be downloaded for personal use only. Any other use requires prior permission of the author and the American Vacuum Society. The electronic version of this article is the complete one and can be found at: http://dx.doi.org/10.1116/1.3517717DOI: 10.1116/1.3517717Top-down critical dimension scanning electron microscopy (SEM) is still the workhorse metrology tool used for nanoscale structure analysis, such as measurement of photoresist features, during integrated circuit manufacturing. However, the degree to which top-down SEM imaging can accurately be used to quantitatively determine the size, shape, and roughness characteristics of three-dimensional structures such as photoresist features has n...
© 2008 American Vacuum Society. This article may be downloaded for personal use only. Any other use ...
Exploring the resolution limit of electron-beam lithography is of great interest both scientifically...
This PhD work focuses on transistor MOS miniaturisation for leading the CMOS technology to ultimate ...
Background: Line-edge roughness (LER) is often measured from top-down critical dimension scanning el...
Line-edge roughness (LER) is often measured from top-down critical dimension scanning electron micro...
The state of the art in Monte Carlo simulations of scanning electron microscope (SEM) signals is rev...
The scanning electron microscope (SEM) has unique capabilities for high resolution examination of su...
As critical dimensions shrink, line edge and width roughness (LER and LWR) become of increasing conc...
Mask contributors to line-edge roughness (LER) have recently been shown to be an issue of concern fo...
The paper discusses the approach of using single detector system to classify the photo resist surfac...
We investigated the off-line metrology for line edge roughness (LER) determination by using the disc...
The ability to accurately quantify the intrinsic resolution of chemically amplified photoresists is ...
A procedure for calibrating a resist model iteratively adjusts appropriate parameters until the simu...
Line edge roughness (LER) is a potential showstopper for the semiconductor industry. As the width of...
In this paper, line edge roughness (LER) analysis on top–down images acquired by means of a scanning...
© 2008 American Vacuum Society. This article may be downloaded for personal use only. Any other use ...
Exploring the resolution limit of electron-beam lithography is of great interest both scientifically...
This PhD work focuses on transistor MOS miniaturisation for leading the CMOS technology to ultimate ...
Background: Line-edge roughness (LER) is often measured from top-down critical dimension scanning el...
Line-edge roughness (LER) is often measured from top-down critical dimension scanning electron micro...
The state of the art in Monte Carlo simulations of scanning electron microscope (SEM) signals is rev...
The scanning electron microscope (SEM) has unique capabilities for high resolution examination of su...
As critical dimensions shrink, line edge and width roughness (LER and LWR) become of increasing conc...
Mask contributors to line-edge roughness (LER) have recently been shown to be an issue of concern fo...
The paper discusses the approach of using single detector system to classify the photo resist surfac...
We investigated the off-line metrology for line edge roughness (LER) determination by using the disc...
The ability to accurately quantify the intrinsic resolution of chemically amplified photoresists is ...
A procedure for calibrating a resist model iteratively adjusts appropriate parameters until the simu...
Line edge roughness (LER) is a potential showstopper for the semiconductor industry. As the width of...
In this paper, line edge roughness (LER) analysis on top–down images acquired by means of a scanning...
© 2008 American Vacuum Society. This article may be downloaded for personal use only. Any other use ...
Exploring the resolution limit of electron-beam lithography is of great interest both scientifically...
This PhD work focuses on transistor MOS miniaturisation for leading the CMOS technology to ultimate ...