This paper recasts the multiple data path assignment problem solved by Torng and Wilhelm by the dynamic programming method [1] into a minimal covering problem following a switching theoretic approach. The concept of bus compatibility for the data transfers is used to obtain the various ways of interconnecting the circuit modules with the minimum number of buses that allow concurrent data transfers. These have been called the feasible solutions of the problem. The minimal cost solutions are obtained by assigning weights to the bus-compatible sets present in the feasible solutions. Minimization of the cost of the solution by increasing the number of buses is also discussed
This book covers layout design and layout migration methodologies for optimizing multi-net wire stru...
Abstract: In order to build large shared-memory multiprocessor systems that take advantage of curren...
Abstract-The most creative step in synthesizing data paths executing software descriptions is the ha...
This paper recasts the multiple data path assignment problem solved by Torng and Wilhelm by the dyna...
AbstractIn this paper the problem of interconnecting circuit modules in microprocessor and digital s...
Multi-Chip Module design is an increasingly common design style for integrated circuits. The area ta...
Optimization of interconnects among processors and memories becomes important as multiple processors...
[[abstract]]This paper addresses the interconnection synthesis problem in microarchitecture-level de...
[[abstract]]This paper addresses the interconnection synthesis problem in microarchitecture-level de...
[[abstract]]This paper addresses the interconnection synthesis problem in microarchitecture-level de...
Since the cost of the interconnection network grows with the number of buses (due to the connection ...
The problem of optimal space allocation among interconnecting wires of VLSI chips, in order to minim...
The lithography used for 32 nanometers and smaller VLSI process technologies restricts the admissibl...
In this paper, we presented algorithms for the implementation of data transfer requirements of a sys...
This paper considers several different algorithms that reduce the required number of buses for multi...
This book covers layout design and layout migration methodologies for optimizing multi-net wire stru...
Abstract: In order to build large shared-memory multiprocessor systems that take advantage of curren...
Abstract-The most creative step in synthesizing data paths executing software descriptions is the ha...
This paper recasts the multiple data path assignment problem solved by Torng and Wilhelm by the dyna...
AbstractIn this paper the problem of interconnecting circuit modules in microprocessor and digital s...
Multi-Chip Module design is an increasingly common design style for integrated circuits. The area ta...
Optimization of interconnects among processors and memories becomes important as multiple processors...
[[abstract]]This paper addresses the interconnection synthesis problem in microarchitecture-level de...
[[abstract]]This paper addresses the interconnection synthesis problem in microarchitecture-level de...
[[abstract]]This paper addresses the interconnection synthesis problem in microarchitecture-level de...
Since the cost of the interconnection network grows with the number of buses (due to the connection ...
The problem of optimal space allocation among interconnecting wires of VLSI chips, in order to minim...
The lithography used for 32 nanometers and smaller VLSI process technologies restricts the admissibl...
In this paper, we presented algorithms for the implementation of data transfer requirements of a sys...
This paper considers several different algorithms that reduce the required number of buses for multi...
This book covers layout design and layout migration methodologies for optimizing multi-net wire stru...
Abstract: In order to build large shared-memory multiprocessor systems that take advantage of curren...
Abstract-The most creative step in synthesizing data paths executing software descriptions is the ha...