Design of a high speed communication controller for a multicomputer system-an FSM approach

The paper describes the design of an interprocessor communication controller for a multicomputer system. The communication controller is designed using a finite state machine technique and implemented using off the shelf components. The communication controller operates with very little CPU intervention, hence the communication and computation can go in parallel. The communication controller interfaces the processing elements to a custom made bus with a FIFO memory for buffering the messages. It has built in intelligence to route the messages dynamicall