In this paper we discuss a method to perform compile-time buffer allocation, allowing efficient buffer sharing among the arcs of a special form of dataflow graphs-known as regular stream flow graphs-commonly used in Digital Signal Processing applications. We relate the buffer sharing problem to that of finding independent sets in weighted circular arc graph. An important difference between the traditional graph coloring/register allocation problem and our buffer sharing problem is that in our problem the aim is to minimize the sum of the weights of the independent sets, rather than the number of independent sets. We present a heuristic algorithm and experiment it on a large number of randomly generated regular dataflow graphs as well as a f...
This paper presents efficient automatic code synthesis techniques from dataflow graphs for multimedi...
In this paper, we propose a new single appearance schedule for synchronous dataflow programs to mini...
The trade-off between throughput and memory constraints is a common design problem in embedded syste...
In this paper we discuss a method to perform compile-time buffer allocation, allowing efficient buff...
Large-grain synchronous dataflow graphs or multi-rate graphs have the distinct feature that the node...
This paper minimizes the buffer size and the buffer memory management performance overhead for a syn...
The goal of buffer allocation for real-time streaming applications, modeled as dataflow graphs, is t...
A key step in the design of cyclo-static real-time systems is the determination of buffer capacities...
This paper proposes a new efficient buffer management technique called shift buffering for automatic...
Buffering of intermediate results in dataflow diagrams can significantly reduce latency when a user ...
Multimedia applications usually have throughput constraints. An implementation must meet these const...
This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This ...
This paper builds upon research by Lee [1] concerning the token flow model, an analytical model for ...
Commercial high-level synthesis tools typically produce statically scheduled circuits. Yet, effectiv...
This paper determines a static scheduling and the minimal size of arc buffers for a given synchronou...
This paper presents efficient automatic code synthesis techniques from dataflow graphs for multimedi...
In this paper, we propose a new single appearance schedule for synchronous dataflow programs to mini...
The trade-off between throughput and memory constraints is a common design problem in embedded syste...
In this paper we discuss a method to perform compile-time buffer allocation, allowing efficient buff...
Large-grain synchronous dataflow graphs or multi-rate graphs have the distinct feature that the node...
This paper minimizes the buffer size and the buffer memory management performance overhead for a syn...
The goal of buffer allocation for real-time streaming applications, modeled as dataflow graphs, is t...
A key step in the design of cyclo-static real-time systems is the determination of buffer capacities...
This paper proposes a new efficient buffer management technique called shift buffering for automatic...
Buffering of intermediate results in dataflow diagrams can significantly reduce latency when a user ...
Multimedia applications usually have throughput constraints. An implementation must meet these const...
This paper concerns throughput-constrained parallel execution of synchronous data flow graphs. This ...
This paper builds upon research by Lee [1] concerning the token flow model, an analytical model for ...
Commercial high-level synthesis tools typically produce statically scheduled circuits. Yet, effectiv...
This paper determines a static scheduling and the minimal size of arc buffers for a given synchronou...
This paper presents efficient automatic code synthesis techniques from dataflow graphs for multimedi...
In this paper, we propose a new single appearance schedule for synchronous dataflow programs to mini...
The trade-off between throughput and memory constraints is a common design problem in embedded syste...