?????? ?????? ?????? ????????? ????????? ??????????????? ????????? ??????(HMC)??? ???????????? ?????? ??????(MAC) ????????? ?????? ????????? ????????? ?????????(PIM)

2012??? Micron?????? ????????? ??????????????? ????????? ?????? (HMC)??? through-silicon vias (TSVs)??? ???????????? ?????? ?????? ?????? 4?????? DRAM ????????? ????????? 3D ????????? ????????? ??????. HMC??? ????????? ?????? ????????? DRAM ????????? ?????? ????????? ??????????????? ?????? vault??? ???????????? ????????? ?????? vault??? ?????? ???????????? ?????? ??????????????? ????????? request?????? ?????????????????? DRAM ???????????? ???????????? ????????? ??????????????? ????????? vault ??????????????? ???????????? ?????? ????????? ?????? ?????? vault?????? ??????????????? ????????? ??? ??????. ????????? ?????? ????????? request?????? ????????? vault????????? ??????????????? ????????? ??? ??????. ??????, ?????? ?????? HMC?????? ?????? ????????? ?????? ?????? ???????????? ?????? ????????? ????????? ???????????? ??? ?????? ?????? ????????? ?????? ???????????? ???????????? ????????? ???????????? ?????? processing-in-memory (PIM) ??????????????? ?????? ???????????? ?????? ????????? DRAM ???????????????. ??? ?????? ??????????????? HMC??? ????????? ???????????? ??????????????? ????????? ?????? ?????? ?????? (SerDes)??? ?????? ?????? ?????? ??? HMC atomic command??? ????????? MAC ?????? PIM ??????????????? ?????? ????????? ???????????????. ??? ????????? ??? ????????? HMC??? ????????? PIM ???????????? ????????????, ????????? ?????? HMC ?????????????????? ?????? PIM ??????????????? HMC ???????????? ????????? ??? ????????????????????? ????????? ??????????????? ?????? ?????? ???????????? HMC ??????????????? ??????????????? ???????????? ?????? ?????? ?????? ????????? ?????? ?????? ????????? ????????? ???????????? HMC ?????? PIM ??????????????? ?????? ???????????? ?????????. ??? ??????????????? ??? ????????? ????????? ?????? ?????? HMC ??????????????? (CasHMC)??? ???????????????. HMC??? ????????? request??? ??????, HMC ??????, ?????? ?????? ??? ?????? ????????? ?????? ????????? ??????????????? ????????? ????????? ???????????????. ?????? ???????????? ?????? ?????? ?????? ?????? ????????? access??? ???????????? CPU??? ?????? ?????? ????????? ?????? ???????????? ???????????? ??????????????? ????????? ?????????????????? ????????????. ????????? CasHMC??? HMC??? ?????? ????????? ??????????????? ?????? ????????? wrapper??? ?????? ?????? CPU ?????????????????? ????????? ???????????? HMC?????? ???????????? ???????????? ?????? ??????????????? ???????????? ????????? ??????????????? ???????????? ????????? ????????? ?????? ????????? ??? ?????? ???????????? ??????????????? ??? ????????? ??? ??? ??????. ?????? ?????? ?????? ?????? ????????? ?????? ?????? ????????? ????????? ???????????? ??????????????????, ?????? ?????? ????????? ?????? ???????????? HMC??? ?????? ??? ?????? ?????? HMC ???????????? ???????????????. ??? ????????? ????????? ????????? ?????? ?????? ?????? (SerDes) ?????? ?????? ????????? HMC??? ?????? ????????? ?????? ?????? ??? ??????. HMC??? ?????? ???????????? ????????? ?????? ?????? ????????? CPU??? ???????????? ?????? ????????? ???????????? ?????? ?????????. ????????? ????????? ????????? ????????? ?????? ?????? ???????????? ????????? ????????? ???????????? ???????????? ????????? ????????? ?????? ???????????? ??????. ?????? ?????? HMC ????????? ???????????? ?????? ????????? ?????? ?????? ????????? ???????????? ???????????? ???????????? ??????. ????????? ????????? ?????? ?????? ?????? ????????? 2????????? ?????? ????????? HMC??? ???????????? ???????????? ?????? ?????? ????????? ????????? ????????? ????????? ????????? ?????? ?????? ????????? ?????? ??? ??????. ????????? ?????? ???????????? miss status holding registers (MSHRs)??? non-blocking ?????? ???????????? ?????? ????????? ??????????????????. MSHRs??? ????????? ???????????? ????????? ?????? request?????? ???????????? ???????????? ?????? ???????????? ????????? request?????? ????????? ???????????? ?????? ?????? HMC??? ???????????? ????????? ??? ??????. ????????? ?????? ????????? ?????? ???????????? HMC ?????? ????????? ???????????? ????????? ?????? ???????????? ?????? HMC ???????????? ????????? ??? ??????. ??? ????????? ???????????? ????????? ????????? ?????? ?????? ?????? ????????? ?????? ?????? 1.36%????????? ????????? ?????? ????????? 63.06% ?????? ??? ?????? ?????? ???????????????. ??????????????? ????????? MAC ????????? ????????? HMC ?????? PIM ???????????? (HMC-MAC)??? HMC??? PIM?????? ???????????? ?????? ?????? ??? ??? ??????. HMC??? ?????? ???????????? ?????? ????????? ?????? ????????? ???????????? ????????? PIM ???????????? ?????? ????????? ?????? ?????? ??????. HMC-MAC????????? ????????? HMC atomic command ????????? ?????? ????????? HMC ???????????? ????????? ????????? ???????????? MAC ????????? ??????????????? ?????????. ?????? ????????? ????????? ?????? ???????????? vault??? bank, ????????? block access ???????????? request??? ?????? ????????? ??????????????? ?????????. ?????? ?????? ?????? CPU ?????? MAC ???????????? HMC?????? MAC ????????? 6??? ?????? ????????? ?????? ????????? ?????? ?????? ???????????????. ???, ?????? ?????? MAC ????????? ??????????????? HMC-MAC??? CPU ???????????? ????????? ?????? ????????? ?????? ?????? ?????? ???????????????.Due to its outstanding advantages such as parallel processing in vault-level and a logic die in the bottom of the DRAM stacking, hybrid memory cube (HMC) has received a great deal of attention in recent years. HMC has been studied in various memory systems and even studied for processing-in-memory (PIM) architectures due to the logic die which can implement various atomic operations. However, it is difficult to conduct a research for HMC, because of the lack of the HMC specific simulator. In addition, a number of studies have emphasized that the link power consumption in HMC is significant. In this dissertation, we have studied PIM architecture for multiply-accumulate (MAC) operation with link power management on HMC. The main objectives of this dissertation are including a cycle-accurate simulator for HMC called CasHMC, an autonomous link power management method, and a novel PIM architecture called HMC-MAC. CasHMC is the first cycle-accurate level HMC simulator which simulates a behavior of the HMC with all data requests/responses and atomic commands in accordance with the HMC specification 2.0. CasHMC implements the high speed serial link for HMC to estimate performance and power consumption accurately and also supports various link settings which include the number of links, the lane speed, and the link width. In addition, CasHMC simulation is verified by the correlation between CasHMC simulation result and trace file extracted by a CPU simulator with SPEC CPU2006 benchmark. The autonomous link power management minimizes link power consumption while satisfying the required link performance. The proposed management determines the optimal number of active link by two metrics which are the cache miss status holding registers (MSHRs) and the link monitor. The simulation results show that the proposed management achieves 63.06% reduction compared to no management in the link power consumption with only 1.36% performance degradation on average. HMC-MAC is a novel PIM architecture that implements the MAC operation in the HMC. Since the proposed HMC-MAC makes the best use of the conventional HMC structure, the amount of modification to the logic die is minimal. Furthermore, a large number of MAC operations can be processed in parallel, because each vault controller is functionally and operationally independent of each other. The simulation results show that the CPU-based MAC execution (ARM Cortex-A8 with NEON) takes longer than the HMC-MAC execution as long as the MAC operation is repeated at least six times or more. The utilization and improvement of the conventional HMC are described in this dissertation, such as CasHMC, autonomous link power management, and HMC-MAC. All research works can contribute to the study of a PIM architecture based on HMC. Furthermore, these are expected to help understand the HMC structure and conduct new researches on HMC.Docto