International audienceConsiderable efforts have been devoted to the design of low-power digital electronics. However, after decades of improvements and maturation, CMOS technology could face an efficiency ceiling. This is due to the trade-off between leakage and conduction losses inherent to transistors. Consequently, the lowest dissipation per operation remains nowadays few decades higher than the theoretical Landauer's limit (3 zJ at 300 K). Adiabatic CMOS architectures are good candidates for reducing the dynamic losses. But adiabatic operation reduces operating frequency, thus exacerbating the leakage loss. Consequently, transistors could not be the appropriate support for adiabatic logic. In this paper, we bring in a new paradigm for c...
International audienceThis paper reports the design, energy recovery and logical functionality model...
This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic l...
Technology scaling increases the density and performance of nanometer circuits, resulting in both la...
International audienceConsiderable efforts have been devoted to the design of low-power digital elec...
We propose a concept of ultra-low-power logic gates based on flexural capacitive MEMS. Contactless o...
International audienceCMOS technology allows a femto Joule energy dissipation per logic operation, i...
With ever-increasing growth in VLSI technologies the number of gates per chip area is constantly inc...
With the recent trend toward portable communication and computing, power dissipation has become one ...
International audienceAlthough CMOS technology scaling combined with efficient frequency and voltage...
Due to various advantages, CMOS are being widely used in designing of LSI(Large Scale Integration) &...
International audienceThis paper introduces a new paradigm to implement logic gates based on variabl...
In these years, logic circuits intend to develop towards low energy consumption. Therefore, adiab...
This paper presents a new family of logic gates for ultra low energy computing using pulsed power CM...
International audienceThis paper presents the energy analysis of capacitive adiabatic logic (CAL) ba...
This paper deals with design opportunities of CMOS based reversible logic circuits employing adiabat...
International audienceThis paper reports the design, energy recovery and logical functionality model...
This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic l...
Technology scaling increases the density and performance of nanometer circuits, resulting in both la...
International audienceConsiderable efforts have been devoted to the design of low-power digital elec...
We propose a concept of ultra-low-power logic gates based on flexural capacitive MEMS. Contactless o...
International audienceCMOS technology allows a femto Joule energy dissipation per logic operation, i...
With ever-increasing growth in VLSI technologies the number of gates per chip area is constantly inc...
With the recent trend toward portable communication and computing, power dissipation has become one ...
International audienceAlthough CMOS technology scaling combined with efficient frequency and voltage...
Due to various advantages, CMOS are being widely used in designing of LSI(Large Scale Integration) &...
International audienceThis paper introduces a new paradigm to implement logic gates based on variabl...
In these years, logic circuits intend to develop towards low energy consumption. Therefore, adiab...
This paper presents a new family of logic gates for ultra low energy computing using pulsed power CM...
International audienceThis paper presents the energy analysis of capacitive adiabatic logic (CAL) ba...
This paper deals with design opportunities of CMOS based reversible logic circuits employing adiabat...
International audienceThis paper reports the design, energy recovery and logical functionality model...
This paper qualitatively explores the performance limits, i.e., energy vs. frequency, of adiabatic l...
Technology scaling increases the density and performance of nanometer circuits, resulting in both la...