A GaN-SiC hybrid material for high-frequency and power electronics

We demonstrate that 3.5% in-plane lattice mismatch between GaN (0001) epitaxial layers and SiC (0001) substrates can be accommodated without triggering extended defects over large areas using a grain-boundary-free AIN nucleation layer (NL). Defect formation in the initial epitaxial growth phase is thus significantly alleviated, confirmed by various characterization techniques. As a result, a high-quality 0.2-mu m thin GaN layer can be grown on the AIN NL and directly serve as a channel layer in power devices, like high electron mobility transistors (HEMTs). The channel electrons exhibit a state-of-the-art mobility of amp;gt;2000 cm(2)/V-s, in the AlGaN/GaN heterostructures without a conventional thick C- or Fe-doped buffer layer. The highly scaled transistor processed on the heterostructure with a nearly perfect GaN-SiC interface shows excellent DC and microwave performances. A peak RF power density of 5.8 W/mm was obtained at V-DSQ = 40 V and a fundamental frequency of 30 GHz. Moreover, an unpassivated 0.2-mu m GaN/AIN/SiC stack shows lateral and vertical breakdowns at 1.5 kV. Perfecting the GaN-SiC interface enables a GaN-SiC hybrid material that combines the high-electron-velocity thin GaN with the high-breakdown bulk SiC, which promises further advances in a wide spectrum of high-frequency and power electronics