Low power mixed signal design for biomedical circuits

© 2012 Dr. Leila KoushaeianThe development of an integrated low-power biomedical circuit for use in the retinal prosthesis (bionic eye) project holds the promise of restoring sight for people suffering from age related macular degeneration (AMD) and retinitis pigmentosa (RP). Minimal power consumption is a critical issue for such a prosthesis because of heating and wireless power transfer. It is also important for the chip to be small because of surgical and implantation constraints. Low cost is also important. Integration of the required circuit blocks onto one single die is technically challenging due to the wireless block that imposes a size constraint on other parts of the chip. This thesis develops and employs design techniques which decrease circuit size, cost, and power dissipation. In order to achieve a power efficient system, all analog/digital circuits are biased in the weak inversion operating region. This means that each CMOS device is biased with a voltage less than the device threshold voltage. The behaviour of a 65nm CMOS device operating under weak inversion is studied and addressed in detail in this thesis. The design and implementation an edge-triggered D flip flop transmission gate using the leakage control techniques during standby mode is presented. A low power static latch is designed for a successive approximation register state machine where reducing power is crucial for total prosthesis’s energy consumption. Analysis and simulation confirm that the requisite low power specification can be achieved using the techniques developed in this thesis. A low-power comparator was designed in weak inversion mode. It maintains constant transconductance for an operational transconductance amplifier (OTA) over a wide input common mode range signal. This is implemented using a newly proposed error correction biasing technique. A high accuracy, low-power bandgap reference voltage (BGR) circuit for an epiretinal prosthesis is implemented using a self-cascode configuration (SCC) in the feedback loop of the BGR. The SCC-BGR generates a reference of 700 mV and consumes 23 µW at room temperature. The temperature coefficient for an output voltage of 700 mV is 16.4 ppm/°C without trimming, for a temperature ranging from 0°C to 100°C. Noise analysis for the SCC Bandgap reference was performed and the results show that SCC is a desirable choice for low noise applications