We present a design strategy to reduce power demands in application-specific, heterogeneous multiprocessor systems with interdependent subtasks. This power reduction scheme can be used with a randomised search such as a genetic algorithm where multiple trial solutions are tested. The scheme is applied to each trial solution after allocation and scheduling have been performed. Power savings are achieved by equally expanding each processor's execution time with a corresponding reduction in their respective operating voltage. Lowest cost solutions achieve average reductions of 24% while minimum power solutions average 58%
Power minimization is a critical challenge for modern embedded system design. Recently, due to the r...
Cornell UniversityIthaca, NY 14853, U.S.A. Abstract We present a simple rate matching-based mechanis...
Design systems to provide various quality of service (QoS) guaran-tees has received a lot of attenti...
We present a design strategy to reduce power demands in application-specific, heterogeneous multipro...
Power consumption reduction is the primary problem for the design and implementation of heterogeneou...
Reducing power consumption and improving efficiency are important aspects of the development of supe...
Power and energy efficiency is one of the major challenges to achieve exascale computing in the next...
A co-synthesis system is presented, which partitions, schedules, and voltage scales multi-rate syste...
Integrating more cores per chip to increase the performance of processors has been trendingfor the p...
Abstract — In contemporary and future embedded as well as high-performance microprocessors, power co...
Abstract—This paper presents an efficient search method for a scheduling and module selection proble...
International audiencePrecedence-constrained parallel applications are one of the most typical appli...
Abstract. When peak performance is unnecessary, Dynamic Voltage Scaling (DVS) can be used to reduce ...
Abstract:- We present a multiple-voltage high-level synthesis methodology that minimizes power dissi...
[[abstract]]A heterogeneous multi-processor (HeMP) system consists of several heterogeneous processo...
Power minimization is a critical challenge for modern embedded system design. Recently, due to the r...
Cornell UniversityIthaca, NY 14853, U.S.A. Abstract We present a simple rate matching-based mechanis...
Design systems to provide various quality of service (QoS) guaran-tees has received a lot of attenti...
We present a design strategy to reduce power demands in application-specific, heterogeneous multipro...
Power consumption reduction is the primary problem for the design and implementation of heterogeneou...
Reducing power consumption and improving efficiency are important aspects of the development of supe...
Power and energy efficiency is one of the major challenges to achieve exascale computing in the next...
A co-synthesis system is presented, which partitions, schedules, and voltage scales multi-rate syste...
Integrating more cores per chip to increase the performance of processors has been trendingfor the p...
Abstract — In contemporary and future embedded as well as high-performance microprocessors, power co...
Abstract—This paper presents an efficient search method for a scheduling and module selection proble...
International audiencePrecedence-constrained parallel applications are one of the most typical appli...
Abstract. When peak performance is unnecessary, Dynamic Voltage Scaling (DVS) can be used to reduce ...
Abstract:- We present a multiple-voltage high-level synthesis methodology that minimizes power dissi...
[[abstract]]A heterogeneous multi-processor (HeMP) system consists of several heterogeneous processo...
Power minimization is a critical challenge for modern embedded system design. Recently, due to the r...
Cornell UniversityIthaca, NY 14853, U.S.A. Abstract We present a simple rate matching-based mechanis...
Design systems to provide various quality of service (QoS) guaran-tees has received a lot of attenti...