Technological advances drive hardware to ever smaller feature sizes, causing devices to become more vulnerable to transient faults. Applications can be protected against faults by adding error detection and recovery measures in software. This is popularly achieved by applying automatic program transformations. However, transformations applied to program representations at abstraction levels higher than machine instructions are fundamentally incapable of protecting against vulnerabilities that are introduced during compilation. In particular, a large proportion of a program’s memory accesses are introduced by the compiler backend. This report presents a backend that protects these accesses against faults in the memory system. It is demonstra...
We propose a new approach for reacting to a wide variety of software failures, ranging from remotely...
Fault-tolerance has become an essential concern for processor designers due to increasing soft-error...
As machines increase in scale, it is predicted that failure rates of supercomputers will correspondi...
Technological advances drive hardware to ever smaller feature sizes, causing devices to become more ...
Increasing design complexity for current and future generations of microelectronic technologies lead...
The use of commercial of the shelf (COTS) processors is increasingly attractive for the space domain...
Software-based methods for the detection of control-flow errors caused by transient fault usually co...
The current trend in commercial processors is producing multi-core architectures which pose both an ...
Unpredictable hardware faults and software bugs lead to application crashes, incorrect computations,...
The paper describes a systematic approach for automatically introducing data and code redundancy int...
Over the last years, an increasing number of safety-critical tasks have been demanded for computer s...
Memory corruption bugs continue to plague lowlevel systems software, generally written in unsafe pro...
Aspect‐oriented programming provides an interesting approach for implementing software‐based fault t...
System reliability is becoming a significant concern as technology continues to shrink. This is beca...
We present a hardware-based approach to improve the resilience of a computer system against the erro...
We propose a new approach for reacting to a wide variety of software failures, ranging from remotely...
Fault-tolerance has become an essential concern for processor designers due to increasing soft-error...
As machines increase in scale, it is predicted that failure rates of supercomputers will correspondi...
Technological advances drive hardware to ever smaller feature sizes, causing devices to become more ...
Increasing design complexity for current and future generations of microelectronic technologies lead...
The use of commercial of the shelf (COTS) processors is increasingly attractive for the space domain...
Software-based methods for the detection of control-flow errors caused by transient fault usually co...
The current trend in commercial processors is producing multi-core architectures which pose both an ...
Unpredictable hardware faults and software bugs lead to application crashes, incorrect computations,...
The paper describes a systematic approach for automatically introducing data and code redundancy int...
Over the last years, an increasing number of safety-critical tasks have been demanded for computer s...
Memory corruption bugs continue to plague lowlevel systems software, generally written in unsafe pro...
Aspect‐oriented programming provides an interesting approach for implementing software‐based fault t...
System reliability is becoming a significant concern as technology continues to shrink. This is beca...
We present a hardware-based approach to improve the resilience of a computer system against the erro...
We propose a new approach for reacting to a wide variety of software failures, ranging from remotely...
Fault-tolerance has become an essential concern for processor designers due to increasing soft-error...
As machines increase in scale, it is predicted that failure rates of supercomputers will correspondi...