Processing Effect on Via Extrusion for Through-Silicon Vias (TSVs) in 3D Interconnects: A Comparative Study of Two TSV Structures: Processing Effect on Via Extrusion for Through-Silicon Vias (TSVs) in 3DInterconnects: A Comparative Study of Two TSV Structures

In this paper, processing effects of electroplating and post- plating annealing on via extrusion are investigated. The study is based on two TSV structures with identical geometry but different processing conditions. Via extrusion, stress and material behaviors of the TSV structures were first compared. Electron backscatter diffraction (EBSD) and time-of-flight secondary ion mass spectroscopy (TOF-SIMS) were used to characterize the microstructure of TSVs and the additives incorporated during electroplating. Based on the results, processing effects on via extrusion and its mechanism are discussed, including grain growth, local plasticity, and diffusional creep