International audienceThis paper presents a run-time detection mechanism for access-driven cache-based Side-Channel Attacks (CSCAs) on Intel's x86 architecture. We demonstrate the detection capability and effectiveness of proposed mechanism on Prime+Probe attcks. The mechanism comprises of multiple machine learning models, which use real-time data from the HPCs for detection. Experiments are performed with two different implementations of AES cryptosystem while under Prime+Probe attack. We provide results under stringent design constraints such as: realistic system load conditions, real-time detection accuracy, speed, system-wide performance overhead and distribution of error (i.e., false positives and negatives) for the used machine learni...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceThis paper presents a run-time detection mechanism for access-driven cache-bas...
International audienceThis paper presents a run-time detection mechanism for access-driven cache-bas...
International audienceThis paper presents a run-time detection mechanism for access-driven cache-bas...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceThis paper presents a run-time detection mechanism for access-driven cache-bas...
International audienceThis paper presents a run-time detection mechanism for access-driven cache-bas...
International audienceThis paper presents a run-time detection mechanism for access-driven cache-bas...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceIntel's x86 architecture has been exposed to high resolution and stealthy cach...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceThis paper presents experimental evaluation and comparative analysis on the us...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceWe present a novel run-time detection approach for cache-based side channel at...
International audienceWe present a novel run-time detection approach for cache-based side channel at...