GaAs solar Ccells on nanopatterned Si substrates

Integrating III-Vs onto Si is a promising route toward tandem photovoltaics and cost mitigation of III-V substrates. While many III-V/Si photovoltaic integration approaches have been studied, epitaxial growth on Si allows for fewer processing steps compared to other approaches. However, current epitaxial pathways utilize expensive techniques, such as thermal cycle annealing or thick buffer layers to control defect densities, undermining the low-cost goal of integrating III-Vs with Si. Here, we present single-junction GaAs solar cells grown directly on Si using selective area growth as an alternative low-cost technique to control material quality with a much thinner buffer. We demonstrate a 10.4%-efficient GaAs device grown on a V-grooved Si substrate, which achieved an antiphase domain-free III-V/Si interface and a threading dislocation density of 2 × 10 7 cm -2 , despite the lack of a graded buffer. We compare this growth on V-grooved Si to solar cells grown on polished Si with and without a patterned silica buffer layer, which demonstrate efficiencies of 6.5% and 6.8%, respectively; the polished Si was patterned using nanoimprint lithography, which is a low-cost patterning technique compatible with III-V selective area growth. Cracking is found to be a critical challenge that hinders solar cell performance and is exacerbated by the V-grooved Si surface topography. The results in this paper provide a promising pathway toward high-efficiency, low-cost III-V/Si tandem photovoltaics