High-frequency capacitance-voltage characteristics of amorphous (undoped)/crystalline silicon heterostructures

A numerical procedure is presented for calculating high-frequency capacitance variation with bias in amorphous (undoped)/crystalline silicon heterojunction. The results of the model calculations using this procedure have been reported, for different p silicon substrates. These have been compared with the corresponding capacitance variations in the other limiting case, in which the heterostructure acts like an MIS structure. The effect of interface states on the capacitance characteristics has also been studied. In the second part, we report the results of 1 MHz capacitance measurements on various amorphous (undoped)/crystalline silicon heterostructures