A new programmable successive approximation ADC useful for realizing nonlinear transfer characteristics often required in instrumentation and communications is presented. This nonlinear ADC (NADC) requires a much smaller sized ROM than an NADC reported earlie
Abstract: A high linearity, undersampling 14-bit 357 kSps cyclic analog-to-digital convert (ADC) is ...
Abstract- Wide band characterization of analog-digital converter integral nonlinearity (INL) based o...
In this paper, a novel architecture for self-timed analog-to-digital conversion is presented and des...
A new programmable successive approximation ADC useful for realizing nonlinear transfer characterist...
Programmable nonlinear analog-to-digital conversion is a new topic in electrical engineering curricu...
A new method to reduce the differential linearity of successive approximation analog-to-digital conv...
Differential non-linearity (DNL) compensation in an analog-to-digital converter (ADC) is discussed. ...
This paper presents a bit cycling method to improve the max root mean square (rms) value of differen...
A 6-bit 200Msps Folding/Interpolating analog to digital converter(ADC) with a novel dynamic encoder ...
An ultra-low-power variable-resolution successive approximation analogue-to-digital converter (ADC) ...
Abstrac t- The performance of current devices is mostly limited by the analogue front-end and analog...
A technique of increasing the resolution of the counter ramp ADC and successive approximation ADC wi...
In this paper, a novel architecture for self-timed analog-to-digital conversion is presented and des...
We present a methodology for nonlinearity compensation amenable to a wide variety of analog-to-digit...
This paper presents the design and realization of a novel low-power 6-bit successive approximation l...
Abstract: A high linearity, undersampling 14-bit 357 kSps cyclic analog-to-digital convert (ADC) is ...
Abstract- Wide band characterization of analog-digital converter integral nonlinearity (INL) based o...
In this paper, a novel architecture for self-timed analog-to-digital conversion is presented and des...
A new programmable successive approximation ADC useful for realizing nonlinear transfer characterist...
Programmable nonlinear analog-to-digital conversion is a new topic in electrical engineering curricu...
A new method to reduce the differential linearity of successive approximation analog-to-digital conv...
Differential non-linearity (DNL) compensation in an analog-to-digital converter (ADC) is discussed. ...
This paper presents a bit cycling method to improve the max root mean square (rms) value of differen...
A 6-bit 200Msps Folding/Interpolating analog to digital converter(ADC) with a novel dynamic encoder ...
An ultra-low-power variable-resolution successive approximation analogue-to-digital converter (ADC) ...
Abstrac t- The performance of current devices is mostly limited by the analogue front-end and analog...
A technique of increasing the resolution of the counter ramp ADC and successive approximation ADC wi...
In this paper, a novel architecture for self-timed analog-to-digital conversion is presented and des...
We present a methodology for nonlinearity compensation amenable to a wide variety of analog-to-digit...
This paper presents the design and realization of a novel low-power 6-bit successive approximation l...
Abstract: A high linearity, undersampling 14-bit 357 kSps cyclic analog-to-digital convert (ADC) is ...
Abstract- Wide band characterization of analog-digital converter integral nonlinearity (INL) based o...
In this paper, a novel architecture for self-timed analog-to-digital conversion is presented and des...