REDUNDANT FIRMWARE TEST SETUP IN SIMULATION AND HARDWARE: A FEASIBILITY STUDY

A reliable embedded real-time system has many requirements to fulfil. It must meet target deadlines in a number of situations, most of them in a situation that puts heavy stress on the system. To meet these demands, numerous tests have been created which test the hardware for any possible errors the developers might think of, in order to maximise system reliability and stability. These tests will take a lot of time to execute, and as system complexity grows, more tests are introduced leading to even longer testing times. In this thesis, a method to reduce the testing time of the software and, to a lesser extent, the hardware is examined. By using the full system simulator Simics, an existing industry system from ABB was integrated and tests were performed. A proof of concept test suite for automatic redundancy tests was also implemented. By looking at the test results, it was concluded that the method shows promise. However, problems with the average latency and performance troubles with Simics shows that more work must be put into this research before the system can be run at full speed