Micro-architectural simulation of embedded core heterogeneity with gem5 and McPAT

Conference of 2015 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, RAPIDO 2015 ; Conference Date: 19 January 2015 Through 21 January 2015; Conference Code:113787International audienceEnergy consumption is the major factor limiting performance in embedded systems. In addition, in the next generations of ICs, heat or energy constraints will not allow to power all transistors simultaneously. Heterogeneous multicore systems represent a possible solution to this problem: the diversity of cores provides energy and performance trade-offs. Micro-architectural simulators allow a fast evaluation of such new hardware implementations. Currently, there is no open-source simulator that can estimate the energy and performance trade-offs of asymmetric ARM cores at the micro-architectural level. This article presents a micro-architectural simulator of ARM Cortex - A cores, capable of estimating the performance, power and area of core asymmetry. Our simulation framework is based on the open-source gem5 and McPAT simulators. The main contribution is to report our experience with both simulators. We detail how we simulated the CPUs of a big. LITTLE system and validate area estimations and energy/performance trade-offs against published information. Copyright 2015 ACM