Add to ORKGWe summarize most of our studies focused on the main reliability issues that can threat the gain-cells eDRAM behavior when it is simulated at the nano-metric device range has been collected in this review. So, to outperform their memory cell counterparts, we explored different technological proposals and operational regimes where it can be located. The best memory cell performance is observed for the 3T1D-eDRAM cell when it is based on FinFET devices. Both device variability and SEU appear as key reliability issues for memory cells at sub-22nm technology node.Peer ReviewedPostprint (author's final draft
In this review the different concepts of nanoscale resistive switching memory devices are described ...
Embedded memories consume an increasingly dominant part of the overall area and power of a large var...
Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nano...
We summarize most of our studies focused on the main reliability issues that can threat the gain-cel...
Sub-threshold circuits (sub-V T) are a promising alternative in the implementation of low power elec...
With the advent of the slowdown in DRAM capacitor scaling [1] and the increased reliability problems...
This paper explores the feasibility, in terms of performance and reliability, of gain-cell embedded ...
The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated...
SRAM data stability and leakage currents are major concerns in nanometer CMOS technologies. The prim...
Conventional Static Random Access Memory (SRAM) cells suffer from an intrinsic data instability prob...
In this paper, standard-cell based memories (SCMs) are proposed as an alternative to full-custom sub...
3T1D cell has been stated as a valid alternative to be implemented on L1 memory cache to substitute ...
The digital technology in the nanoelectronic era is based on intensive data processing and battery-b...
In this thesis, we have investigated the impact of parametric variations on the behaviour of one per...
Bio-medical wearable devices restricted to their small-capacity embedded-battery require energy-effi...
In this review the different concepts of nanoscale resistive switching memory devices are described ...
Embedded memories consume an increasingly dominant part of the overall area and power of a large var...
Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nano...
We summarize most of our studies focused on the main reliability issues that can threat the gain-cel...
Sub-threshold circuits (sub-V T) are a promising alternative in the implementation of low power elec...
With the advent of the slowdown in DRAM capacitor scaling [1] and the increased reliability problems...
This paper explores the feasibility, in terms of performance and reliability, of gain-cell embedded ...
The 21st century is witnessing a tremendous demand for transistors. Life amenities have incorporated...
SRAM data stability and leakage currents are major concerns in nanometer CMOS technologies. The prim...
Conventional Static Random Access Memory (SRAM) cells suffer from an intrinsic data instability prob...
In this paper, standard-cell based memories (SCMs) are proposed as an alternative to full-custom sub...
3T1D cell has been stated as a valid alternative to be implemented on L1 memory cache to substitute ...
The digital technology in the nanoelectronic era is based on intensive data processing and battery-b...
In this thesis, we have investigated the impact of parametric variations on the behaviour of one per...
Bio-medical wearable devices restricted to their small-capacity embedded-battery require energy-effi...
In this review the different concepts of nanoscale resistive switching memory devices are described ...
Embedded memories consume an increasingly dominant part of the overall area and power of a large var...
Variability is one of the most challenging obstacles for IC design in the nanometer regime. In nano...